C model updates

Author: Virat Agarwal

common/utility/reference.json

@@ -146,6 +146,7 @@
         "SLR Assignments": "https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/migrating_new_target_platform.html#img1535745661571",
         "SystemC": "https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/runemulation1.html#cmo1619037605921",
         "XRT Native API": "https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devhostapp.html#jln1620691667890",
-        "P2P": "https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/Chunk938767849.html#qex1558551641915" 
+        "P2P": "https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/Chunk938767849.html#qex1558551641915",
+        "RTL C-Model": "https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/rtl_kernel_wizard.html#wnd1523535864477"
     }
 }

rtl_kernels/README.md

@@ -9,7 +9,7 @@ Example        | Description           | Key Concepts / Keywords
 [rtl_adder_streams/][]|This example shows an adder with streams using 3 RTL kernels.|__Key__ __Concepts__<br> - [RTL Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br> - [Multiple RTL Kernels](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br>
 [rtl_streaming_free_running_k2k/][]|This is simple example which demonstrate how to use and configure a free running RTL kernel.|__Key__ __Concepts__<br> - [Read/Write Stream](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/streamingconnections.html#ynb1556233012018)<br> - [RTL Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br> - [Free Running Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/streamingconnections.html#uug1556136182736)<br>__Keywords__<br> - [ap_axiu](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/streamingconnections.html#tzq1555344621950)<br> - [hls::stream](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hls_stream_library.html)
 [rtl_streaming_k2k_mm/][]|This example uses two simple increment RTL kernels connected to each other via stream interface and connected to host via memory mapped C++ data mover kernels|__Key__ __Concepts__<br> - [Read/Write Stream](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/streamingconnections.html#ynb1556233012018)<br> - [RTL Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br>__Keywords__<br> - [ap_axiu](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/streamingconnections.html#tzq1555344621950)<br> - [hls::stream](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hls_stream_library.html)
-[rtl_vadd/][]|Simple example of vector addition using RTL Kernel|__Key__ __Concepts__<br> - [RTL Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br>__Keywords__<br> - [kernel_files](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html#nuy1588349382079)
+[rtl_vadd/][]|This is a simple example of vector addition using RTL kernel and supports all flows including sw_emu using C-Model.|__Key__ __Concepts__<br> - [RTL Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br> - [RTL C-Model](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/rtl_kernel_wizard.html#wnd1523535864477)<br>__Keywords__<br> - [kernel_files](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html#nuy1588349382079)
 [rtl_vadd_2clks/][]|This example shows vector addition with 2 kernel clocks using RTL Kernel.|__Key__ __Concepts__<br> - [RTL Kernel](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br> - [Multiple Kernel Clocks](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/vitiscommandcompiler.html#mcj1568640526180__section_bh5_dg4_bjb)<br>__Keywords__<br> - [clock](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/vitiscommandcompiler.html#ans1568640653312)<br> - [freqHz](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/vitiscommandcompiler.html#ans1568640653312__section_vh5_yf4_bjb)<br> - [ap_clk](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/managing_interface_synthesis.html#opo1539734223038)<br> - ap_clk2
 [rtl_vadd_2kernels/][]|This example has two RTL Kernels. Both Kernel_0 and Kernel_1 perform vector addition. The Kernel_1 reads the output from Kernel_0 as one of two inputs.|__Key__ __Concepts__<br> - [Multiple RTL Kernels](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html)<br>
 [rtl_vadd_hw_debug/][]|This is an example that showcases the Hardware Debug of Vector Addition RTL Kernel in Hardware.|__Key__ __Concepts__<br> - [RTL Kernel Debug](https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/debuggingapplicationskernels.html#xey1524445482547)<br>

rtl_kernels/rtl_vadd/README.rst

@@ -1,9 +1,9 @@
 Vadd Simple (RTL Kernel)
 ========================
 
-Simple example of vector addition using RTL Kernel
+This is a simple example of vector addition using RTL kernel and supports all flows including sw_emu using C-Model.
 
-**KEY CONCEPTS:** `RTL Kernel <https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html>`__
+**KEY CONCEPTS:** `RTL Kernel <https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html>`__, `RTL C-Model <https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/rtl_kernel_wizard.html#wnd1523535864477>`__
 
 **KEYWORDS:** `kernel_files <https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/devrtlkernel.html#nuy1588349382079>`__
 
@@ -23,15 +23,17 @@ Application code is located in the src directory. Accelerator binary files will
 
 ::
 
-   src/hdl/krnl_vadd_rtl.v
-   src/hdl/krnl_vadd_rtl_adder.sv
-   src/hdl/krnl_vadd_rtl_axi_read_master.sv
-   src/hdl/krnl_vadd_rtl_axi_write_master.sv
-   src/hdl/krnl_vadd_rtl_control_s_axi.v
-   src/hdl/krnl_vadd_rtl_counter.sv
-   src/hdl/krnl_vadd_rtl_int.sv
    src/host.cpp
-   src/vadd.cpp
+   src/krnl_vadd/gen_xo.tcl
+   src/krnl_vadd/hdl/krnl_vadd_rtl.v
+   src/krnl_vadd/hdl/krnl_vadd_rtl_adder.sv
+   src/krnl_vadd/hdl/krnl_vadd_rtl_axi_read_master.sv
+   src/krnl_vadd/hdl/krnl_vadd_rtl_axi_write_master.sv
+   src/krnl_vadd/hdl/krnl_vadd_rtl_control_s_axi.v
+   src/krnl_vadd/hdl/krnl_vadd_rtl_counter.sv
+   src/krnl_vadd/hdl/krnl_vadd_rtl_int.sv
+   src/krnl_vadd/package_kernel.tcl
+   src/krnl_vadd/vadd_CModel.cpp
    
 COMMAND LINE ARGUMENTS
 ----------------------
@@ -62,6 +64,6 @@ The example also supports sw_emu by running the vadd.cpp code provided in the ``
 
 ::
 
-   package_xo -xo_path ${xoname} -kernel_name krnl_vadd_rtl -ip_directory ./packaged_kernel_${suffix} -kernel_files src/vadd.cpp
+   package_xo -xo_path ${xoname} -kernel_name krnl_vadd_rtl -ip_directory ./packaged_kernel_${suffix} -kernel_files src/krnl_vadd/vadd_CModel.cpp
 
 For more comprehensive documentation, `click here <http://xilinx.github.io/Vitis_Accel_Examples>`__.

rtl_kernels/rtl_vadd/config.mk

@@ -1,4 +1,4 @@
 VIVADO := $(XILINX_VIVADO)/bin/vivado
-$(TEMP_DIR)/vadd.xo: scripts/package_kernel.tcl scripts/gen_xo.tcl src/hdl/*.sv src/hdl/*.v 
+$(TEMP_DIR)/vadd.xo: src/krnl_vadd/package_kernel.tcl src/krnl_vadd/gen_xo.tcl src/krnl_vadd/hdl/*.sv src/krnl_vadd/hdl/*.v 
 	mkdir -p $(TEMP_DIR)
-	$(VIVADO) -mode batch -source scripts/gen_xo.tcl -tclargs $(TEMP_DIR)/vadd.xo vadd $(TARGET) $(DEVICE) $(XSA)
+	$(VIVADO) -mode batch -source src/krnl_vadd/gen_xo.tcl -tclargs $(TEMP_DIR)/vadd.xo $(TARGET) $(DEVICE) $(XSA)

rtl_kernels/rtl_vadd/description.json

@@ -1,14 +1,15 @@
 {
     "name": "Vadd Simple (RTL Kernel)", 
     "description": [
-        "Simple example of vector addition using RTL Kernel"
+        "This is a simple example of vector addition using RTL kernel and supports all flows including sw_emu using C-Model."
     ], 
     "flow": "vitis",
     "keywords": [
         "kernel_files"
     ],
     "key_concepts": [
-        "RTL Kernel"
+        "RTL Kernel",
+        "RTL C-Model"
     ],
     "platform_blacklist": [
         "nodma"

rtl_kernels/rtl_vadd/details.rst

@@ -18,4 +18,4 @@ The example also supports sw_emu by running the vadd.cpp code provided in the ``
 
 ::
 
-   package_xo -xo_path ${xoname} -kernel_name krnl_vadd_rtl -ip_directory ./packaged_kernel_${suffix} -kernel_files src/vadd.cpp
+   package_xo -xo_path ${xoname} -kernel_name krnl_vadd_rtl -ip_directory ./packaged_kernel_${suffix} -kernel_files src/krnl_vadd/vadd_CModel.cpp

rtl_kernels/rtl_vadd/scripts/gen_xo.tcl renamed to rtl_kernels/rtl_vadd/src/krnl_vadd/gen_xo.tcl

@@ -14,24 +14,23 @@
 # under the License.
 #
 
-if { $::argc != 5 } {
-    puts "ERROR: Program \"$::argv0\" requires 5 arguments!\n"
-    puts "Usage: $::argv0 <xoname> <krnl_name> <target> <xpfm_path> <device>\n"
+if { $::argc != 4 } {
+    puts "ERROR: Program \"$::argv0\" requires 4 arguments!\n"
+    puts "Usage: $::argv0 <xoname> <target> <xpfm_path> <device>\n"
     exit
 }
 
 set xoname  [lindex $::argv 0]
-set krnl_name [lindex $::argv 1]
-set target    [lindex $::argv 2]
-set xpfm_path [lindex $::argv 3]
-set device    [lindex $::argv 4]
+set target    [lindex $::argv 1]
+set xpfm_path [lindex $::argv 2]
+set device    [lindex $::argv 3]
 
-set suffix "${krnl_name}_${target}_${device}"
+set suffix "vadd_${target}_${device}"
 
-source -notrace ./scripts/package_kernel.tcl
+source -notrace ./src/krnl_vadd/package_kernel.tcl
 
 if {[file exists "${xoname}"]} {
     file delete -force "${xoname}"
 }
 
-package_xo -xo_path ${xoname} -kernel_name krnl_vadd_rtl -ip_directory ./packaged_kernel_${suffix} -kernel_files src/vadd.cpp
+package_xo -xo_path ${xoname} -kernel_name krnl_vadd_rtl -ip_directory ./packaged_kernel_${suffix} -kernel_files src/krnl_vadd/vadd_CModel.cpp