[AutoBump] Merge with fixes of 29441e4 (Jan 29) [2] (#883)

Author: jorickert

clang/lib/CodeGen/CGCall.cpp

@@ -2881,7 +2881,7 @@ void CodeGenModule::ConstructAttributeList(StringRef Name,
     }
 
     if (FI.getExtParameterInfo(ArgNo).isNoEscape())
-      Attrs.addAttribute(llvm::Attribute::NoCapture);
+      Attrs.addCapturesAttr(llvm::CaptureInfo::none());
 
     if (Attrs.hasAttributes()) {
       unsigned FirstIRArg, NumIRArgs;

clang/lib/CodeGen/CGObjCGNU.cpp

@@ -773,7 +773,9 @@ class CGObjCGNUstep : public CGObjCGNU {
 
       // The lookup function is guaranteed not to capture the receiver pointer.
       if (auto *LookupFn2 = dyn_cast<llvm::Function>(LookupFn.getCallee()))
-        LookupFn2->addParamAttr(0, llvm::Attribute::NoCapture);
+        LookupFn2->addParamAttr(
+            0, llvm::Attribute::getWithCaptureInfo(CGF.getLLVMContext(),
+                                                   llvm::CaptureInfo::none()));
 
       llvm::Value *args[] = {
           EnforceType(Builder, ReceiverPtr.getPointer(), PtrToIdTy),

clang/test/CodeGen/AArch64/pure-scalable-args.c

@@ -67,7 +67,7 @@ void test_argpass_simple(PST *p) {
     void argpass_simple_callee(PST);
     argpass_simple_callee(*p);
 }
-// CHECK-AAPCS:      define dso_local void @test_argpass_simple(ptr nocapture noundef readonly %p)
+// CHECK-AAPCS:      define dso_local void @test_argpass_simple(ptr noundef readonly captures(none) %p)
 // CHECK-AAPCS-NEXT: entry:
 // CHECK-AAPCS-NEXT: %0 = load <2 x i8>, ptr %p, align 16
 // CHECK-AAPCS-NEXT: %cast.scalable = tail call <vscale x 2 x i8> @llvm.vector.insert.nxv2i8.v2i8(<vscale x 2 x i8> poison, <2 x i8> %0, i64 0)
@@ -292,24 +292,24 @@ PST test_return(PST *p) {
     return *p;
 }
 // CHECK-AAPCS:  define dso_local <{ <vscale x 16 x i1>, <vscale x 2 x double>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 16 x i8>, <vscale x 16 x i1> }> @test_return(ptr
-// CHECK-DARWIN: define void @test_return(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.PST) align 16 initializes((0, 96)) %agg.result, ptr nocapture noundef readonly %p)
+// CHECK-DARWIN: define void @test_return(ptr dead_on_unwind noalias writable writeonly sret(%struct.PST) align 16 captures(none) initializes((0, 96)) %agg.result, ptr noundef readonly captures(none) %p)
 
 // Corner case of 1-element aggregate
 //   p->x -> q0
 SmallPST test_return_small_pst(SmallPST *p) {
     return *p;
 }
 // CHECK-AAPCS:  define dso_local <vscale x 4 x float> @test_return_small_pst(ptr
-// CHECK-DARWIN: define i128 @test_return_small_pst(ptr nocapture noundef readonly %p)
+// CHECK-DARWIN: define i128 @test_return_small_pst(ptr noundef readonly captures(none) %p)
 
 
 // Big PST, returned indirectly
 //   *p -> *x8
 BigPST test_return_big_pst(BigPST *p) {
     return *p;
 }
-// CHECK-AAPCS:  define dso_local void @test_return_big_pst(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.BigPST) align 16 initializes((0, 176)) %agg.result, ptr nocapture noundef readonly %p)
-// CHECK-DARWIN: define void @test_return_big_pst(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.BigPST) align 16 initializes((0, 176)) %agg.result, ptr nocapture noundef readonly %p)
+// CHECK-AAPCS:  define dso_local void @test_return_big_pst(ptr dead_on_unwind noalias writable writeonly sret(%struct.BigPST) align 16 captures(none) initializes((0, 176)) %agg.result, ptr noundef readonly captures(none) %p)
+// CHECK-DARWIN: define void @test_return_big_pst(ptr dead_on_unwind noalias writable writeonly sret(%struct.BigPST) align 16 captures(none) initializes((0, 176)) %agg.result, ptr noundef readonly captures(none) %p)
 
 // Variadic arguments are unnamed, PST passed indirectly.
 // (Passing SVE types to a variadic function currently unsupported by

clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c

@@ -59,7 +59,7 @@ typedef int8_t vec_int8 __attribute__((vector_size(N / 8)));
 // CHECK128-NEXT:    ret <16 x i8> [[CASTFIXEDSVE]]
 
 // CHECK-LABEL: define{{.*}} void @f2(
-// CHECK-SAME:   ptr dead_on_unwind noalias nocapture writable writeonly sret(<[[#div(VBITS,8)]] x i8>) align 16 initializes((0, [[#div(VBITS,8)]])) %agg.result, ptr nocapture noundef readonly %0)
+// CHECK-SAME:   ptr dead_on_unwind noalias writable writeonly sret(<[[#div(VBITS,8)]] x i8>) align 16 captures(none) initializes((0, [[#div(VBITS,8)]])) %agg.result, ptr noundef readonly captures(none) %0)
 // CHECK-NEXT: entry:
 // CHECK-NEXT:   [[X:%.*]] = load <[[#div(VBITS,8)]] x i8>, ptr [[TMP0:%.*]], align 16, [[TBAA6:!tbaa !.*]]
 // CHECK-NEXT:   [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)

clang/test/CodeGen/PowerPC/aix-vaargs.c

@@ -68,8 +68,8 @@ void testva (int n, ...) {
 
 // CHECK: declare void @llvm.va_start.p0(ptr)
 
-// AIX32: declare void @llvm.memcpy.p0.p0.i32(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i32, i1 immarg)
-// AIX64: declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
+// AIX32: declare void @llvm.memcpy.p0.p0.i32(ptr noalias writeonly captures(none), ptr noalias readonly captures(none), i32, i1 immarg)
+// AIX64: declare void @llvm.memcpy.p0.p0.i64(ptr noalias writeonly captures(none), ptr noalias readonly captures(none), i64, i1 immarg)
 
 // CHECK: declare void @llvm.va_copy.p0(ptr, ptr)
 // CHECK: declare void @llvm.va_end.p0(ptr)

clang/test/CodeGen/SystemZ/systemz-inline-asm.c

@@ -123,7 +123,7 @@ double test_f64(double f, double g) {
 long double test_f128(long double f, long double g) {
   asm("axbr %0, %2" : "=f" (f) : "0" (f), "f" (g));
   return f;
-// CHECK: define{{.*}} void @test_f128(ptr dead_on_unwind noalias nocapture writable writeonly sret(fp128) align 8 initializes((0, 16)) [[DEST:%.*]], ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1)
+// CHECK: define{{.*}} void @test_f128(ptr dead_on_unwind noalias writable writeonly sret(fp128) align 8 captures(none) initializes((0, 16)) [[DEST:%.*]], ptr noundef readonly captures(none) %0, ptr noundef readonly captures(none) %1)
 // CHECK: %f = load fp128, ptr %0
 // CHECK: %g = load fp128, ptr %1
 // CHECK: [[RESULT:%.*]] = tail call fp128 asm "axbr $0, $2", "=f,0,f"(fp128 %f, fp128 %g)

clang/test/CodeGen/aie/aie-bank-annotation.cpp

@@ -13,7 +13,7 @@
 // RUN: %clang -O1 --target=aie2p -nostdlibinc -S -emit-llvm %s -o - | FileCheck %s
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU3AS5iS0_(
-// CHECK-SAME: ptr addrspace(5) nocapture readonly [[NUM:%.*]], ptr addrspace(5) nocapture writeonly initializes((0, 4)) [[MEM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-SAME: ptr addrspace(5) readonly captures(none) [[NUM:%.*]], ptr addrspace(5) writeonly captures(none) initializes((0, 4)) [[MEM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(5) [[NUM]], align 4, !tbaa [[TBAA2:![0-9]+]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -26,7 +26,7 @@ int square(int __aie_dm_resource_a *num, int __aie_dm_resource_a *mem) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU3AS6iS0_(
-// CHECK-SAME: ptr addrspace(6) nocapture readonly [[NUM:%.*]], ptr addrspace(6) nocapture writeonly initializes((0, 4)) [[MEM:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-SAME: ptr addrspace(6) readonly captures(none) [[NUM:%.*]], ptr addrspace(6) writeonly captures(none) initializes((0, 4)) [[MEM:%.*]]) local_unnamed_addr #[[ATTR0]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(6) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -39,7 +39,7 @@ int square(int __aie_dm_resource_b *num, int __aie_dm_resource_b *mem) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU3AS7i(
-// CHECK-SAME: ptr addrspace(7) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-SAME: ptr addrspace(7) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(7) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -51,7 +51,7 @@ int square(int __aie_dm_resource_c *num) {
 
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU3AS8i(
-// CHECK-SAME: ptr addrspace(8) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(8) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(8) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -62,7 +62,7 @@ int square(int __aie_dm_resource_d *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU3AS9i(
-// CHECK-SAME: ptr addrspace(9) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(9) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(9) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -73,7 +73,7 @@ int square(int __aie_dm_resource_ab *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU4AS10i(
-// CHECK-SAME: ptr addrspace(10) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(10) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(10) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -84,7 +84,7 @@ int square(int __aie_dm_resource_ac *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU4AS11i(
-// CHECK-SAME: ptr addrspace(11) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(11) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(11) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -95,7 +95,7 @@ int square(int __aie_dm_resource_ad *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU4AS12i(
-// CHECK-SAME: ptr addrspace(12) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(12) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(12) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -106,7 +106,7 @@ int square(int __aie_dm_resource_bc *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU4AS13i(
-// CHECK-SAME: ptr addrspace(13) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(13) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(13) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -117,7 +117,7 @@ int square(int __aie_dm_resource_bd *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU4AS14i(
-// CHECK-SAME: ptr addrspace(14) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(14) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(14) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]
@@ -128,7 +128,7 @@ int square(int __aie_dm_resource_cd *num) {
 }
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z6squarePU4AS15i(
-// CHECK-SAME: ptr addrspace(15) nocapture readonly [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(15) readonly captures(none) [[NUM:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(15) [[NUM]], align 4, !tbaa [[TBAA2]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]

clang/test/CodeGen/aie/aie2/aie2-TargetAS-to-DefaultAS-assignment.cpp

@@ -12,7 +12,7 @@
 // RUN: %clang -O1 --target=aie2 -nostdlibinc -S -emit-llvm %s -o - | FileCheck %s
 
 // CHECK-LABEL: define dso_local noundef i32 @_Z29check_assignment_toDefault_ASPU3AS6iPi(
-// CHECK-SAME: ptr addrspace(6) nocapture readonly [[NUM:%.*]], ptr nocapture writeonly initializes((0, 4)) [[MEM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-SAME: ptr addrspace(6) readonly captures(none) [[NUM:%.*]], ptr writeonly captures(none) initializes((0, 4)) [[MEM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr addrspace(6) [[NUM]], align 4, !tbaa [[TBAA2:![0-9]+]]
 // CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[TMP0]]

clang/test/CodeGen/aie/aie2/aie2-vector-type-cast.cpp

@@ -33,7 +33,7 @@ v8acc32 v8accfloat_to_v8acc32_implicit(v8accfloat a) {
 }
 
 // CHECK-LABEL: define {{[^@]*}}void @v8accfloat_assign_to_v8acc32
-// CHECK-SAME: (ptr nocapture writeonly initializes((0, 32)) [[A:%.*]], ptr nocapture readonly [[B:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-SAME: (ptr writeonly captures(none) initializes((0, 32)) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i64>, ptr [[B]], align 32, !tbaa [[TBAA2:![0-9]+]]
 // CHECK-NEXT:    store <4 x i64> [[TMP0]], ptr [[A]], align 32, !tbaa [[TBAA2]]
@@ -64,7 +64,7 @@ v8int32 v8accfloat_to_v8int32_implicit(v8accfloat a) {
 }
 
 // CHECK-LABEL: define {{[^@]*}}void @v8accfloat_assign_to_v8int32
-// CHECK-SAME: (ptr nocapture writeonly initializes((0, 32)) [[A:%.*]], ptr nocapture readonly [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: (ptr writeonly captures(none) initializes((0, 32)) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i64>, ptr [[B]], align 32, !tbaa [[TBAA2]]
 // CHECK-NEXT:    store <4 x i64> [[TMP0]], ptr [[A]], align 32, !tbaa [[TBAA2]]