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F-StuckmannF-Stuckmann
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[AIEX] refactor Load/Store Imm check
1 parent 0cc1f18 commit 45c8642

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8 files changed

+292
-207
lines changed

8 files changed

+292
-207
lines changed

‎llvm/lib/Target/AIE/AIE2InstrInfo.cpp‎

Lines changed: 69 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1434,6 +1434,75 @@ AIE2InstrInfo::getZOLSupport() const {
14341434
return Result;
14351435
}
14361436

1437+
bool AIE2InstrInfo::isOffsetInImmediateRange(
1438+
unsigned Opcode, unsigned LoadStoreSize,
1439+
std::optional<APInt> Offset) const {
1440+
if (!Offset)
1441+
return false;
1442+
1443+
switch (Opcode) {
1444+
case AIE2::G_AIE_OFFSET_LOAD:
1445+
case AIE2::G_AIE_OFFSET_STORE: {
1446+
switch (LoadStoreSize) {
1447+
case 8:
1448+
case 16:
1449+
return checkSignedImmediateRange<3, 1>(Offset);
1450+
case 20:
1451+
case 32:
1452+
return checkSignedImmediateRange<6, 4>(Offset);
1453+
case 128:
1454+
return checkSignedImmediateRange<6, 16>(Offset);
1455+
case 256:
1456+
return checkSignedImmediateRange<6, 32>(Offset);
1457+
case 512:
1458+
return checkSignedImmediateRangeSplitting<6, 32, 32>(Offset);
1459+
default:
1460+
return false;
1461+
}
1462+
}
1463+
case AIE2::G_AIE_POSTINC_LOAD:
1464+
case AIE2::G_AIE_POSTINC_STORE: {
1465+
switch (LoadStoreSize) {
1466+
case 8:
1467+
case 16:
1468+
return checkSignedImmediateRange<4, 1>(Offset);
1469+
case 20:
1470+
case 32:
1471+
return checkSignedImmediateRange<7, 4>(Offset);
1472+
case 128:
1473+
return checkSignedImmediateRange<7, 16>(Offset);
1474+
case 256:
1475+
case 512:
1476+
return checkSignedImmediateRange<7, 32>(Offset);
1477+
default:
1478+
return false;
1479+
}
1480+
}
1481+
case AIE2::G_AIE_OFFSET_ZEXTLOAD:
1482+
case AIE2::G_AIE_OFFSET_SEXTLOAD: {
1483+
switch (LoadStoreSize) {
1484+
case 8:
1485+
case 16:
1486+
return checkSignedImmediateRange<3, 1>(Offset);
1487+
default:
1488+
return false;
1489+
}
1490+
}
1491+
case AIE2::G_AIE_POSTINC_SEXTLOAD:
1492+
case AIE2::G_AIE_POSTINC_ZEXTLOAD: {
1493+
switch (LoadStoreSize) {
1494+
case 8:
1495+
case 16:
1496+
return checkSignedImmediateRange<4, 1>(Offset);
1497+
default:
1498+
return false;
1499+
}
1500+
}
1501+
default:
1502+
return false;
1503+
}
1504+
}
1505+
14371506
unsigned AIE2InstrInfo::getPseudoJNZDOpcode() const { return AIE2::PseudoJNZD; }
14381507

14391508
unsigned AIE2InstrInfo::getNumBypassedCycles(const InstrItineraryData *ItinData,

‎llvm/lib/Target/AIE/AIE2InstrInfo.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,10 @@ class AIE2InstrInfo : public AIE2GenInstrInfo {
105105

106106
virtual std::optional<ZOLSupport> getZOLSupport() const override;
107107

108+
virtual bool
109+
isOffsetInImmediateRange(unsigned Opcode, unsigned LoadStoreSize,
110+
std::optional<APInt> Immediate) const override;
111+
108112
virtual unsigned getPseudoJNZDOpcode() const override;
109113

110114
unsigned getNumBypassedCycles(const InstrItineraryData *ItinData,

‎llvm/lib/Target/AIE/AIE2InstructionSelector.cpp‎

Lines changed: 65 additions & 96 deletions
Large diffs are not rendered by default.

‎llvm/lib/Target/AIE/AIEBaseInstrInfo.h‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,10 @@ struct AIEBaseInstrInfo : public TargetInstrInfo {
5959
// of bundles.
6060
unsigned LoopSetupDistance;
6161
};
62+
virtual bool isOffsetInImmediateRange(unsigned Opcode, unsigned LoadStoreSize,
63+
std::optional<APInt> Offset) const {
64+
llvm_unreachable("Target didn't implement OffsetFitImmRange");
65+
}
6266

6367
/// Return the opcode for a return instruction
6468
virtual unsigned getReturnOpcode() const {
@@ -748,6 +752,24 @@ struct AIEBaseInstrInfo : public TargetInstrInfo {
748752
const MIRFormatter *getMIRFormatter() const override;
749753
mutable std::unique_ptr<AIEMIRFormatter> Formatter;
750754
};
755+
756+
template <unsigned NumEncodingBits, unsigned Step>
757+
bool checkSignedImmediateRange(std::optional<APInt> Immediate) {
758+
const unsigned MaxPow2 = NumEncodingBits + llvm::Log2_64(Step);
759+
if (Immediate && isIntN(MaxPow2, Immediate->getSExtValue()) &&
760+
Immediate->getSExtValue() % Step == 0) {
761+
return true;
762+
}
763+
return false;
764+
}
765+
766+
template <unsigned NumEncodingBits, unsigned Step, unsigned SplitOffset>
767+
bool checkSignedImmediateRangeSplitting(std::optional<APInt> Immediate) {
768+
return Immediate &&
769+
checkSignedImmediateRange<NumEncodingBits, Step>(Immediate) &&
770+
checkSignedImmediateRange<NumEncodingBits, Step>(*Immediate +
771+
SplitOffset);
772+
}
751773
} // namespace llvm
752774

753775
#endif // LLVM_LIB_TARGET_AIE_AIEBASEINSTRRINFO_H

‎llvm/lib/Target/AIE/AIEBaseInstructionSelector.h‎

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -198,24 +198,6 @@ inline unsigned getLoadStoreSize(const MachineInstr &MI) {
198198
return (*MI.memoperands_begin())->getSizeInBits().getValue();
199199
}
200200

201-
template <unsigned NumEncodingBits, unsigned Step>
202-
bool checkImmediateRange(std::optional<APInt> Immediate) {
203-
unsigned MaxPow2 = NumEncodingBits + llvm::Log2_64(Step);
204-
if (Immediate && isIntN(MaxPow2, Immediate->getSExtValue()) &&
205-
Immediate->getSExtValue() % Step == 0) {
206-
LLVM_DEBUG(dbgs() << "Immediate " << Immediate << " is valid for MaxPow2 "
207-
<< MaxPow2 << " and Step " << Step << ".\n");
208-
return true;
209-
}
210-
return false;
211-
}
212-
213-
template <unsigned NumEncodingBits, unsigned Step, unsigned SplitOffset>
214-
bool checkImmediateRangeSplitting(std::optional<APInt> Immediate) {
215-
return Immediate && checkImmediateRange<NumEncodingBits, Step>(Immediate) &&
216-
checkImmediateRange<NumEncodingBits, Step>(*Immediate + SplitOffset);
217-
}
218-
219201
inline unsigned deriveRegBankID(Register Reg, const MachineRegisterInfo &MRI,
220202
const RegisterBankInfo &RBI) {
221203
const RegisterBank *RB = MRI.getRegBankOrNull(Reg);

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp‎

Lines changed: 71 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1733,6 +1733,77 @@ AIE2PInstrInfo::getZOLSupport() const {
17331733
return Result;
17341734
}
17351735

1736+
bool AIE2PInstrInfo::isOffsetInImmediateRange(
1737+
unsigned Opcode, unsigned LoadStoreSize,
1738+
std::optional<APInt> Offset) const {
1739+
if (!Offset)
1740+
return false;
1741+
1742+
switch (Opcode) {
1743+
case AIE2P::G_AIE_OFFSET_STORE:
1744+
case AIE2P::G_AIE_OFFSET_LOAD: {
1745+
switch (LoadStoreSize) {
1746+
case 8:
1747+
return checkSignedImmediateRange<4, 1>(Offset);
1748+
case 16:
1749+
return checkSignedImmediateRange<4, 2>(Offset);
1750+
case 20:
1751+
case 32:
1752+
return checkSignedImmediateRange<4, 4>(Offset);
1753+
case 128:
1754+
return checkSignedImmediateRange<4, 16>(Offset);
1755+
case 256:
1756+
return checkSignedImmediateRange<4, 32>(Offset);
1757+
case 512:
1758+
return checkSignedImmediateRange<4, 64>(Offset);
1759+
case 1024:
1760+
return checkSignedImmediateRangeSplitting<4, 64, 64>(Offset);
1761+
case 2048:
1762+
return checkSignedImmediateRangeSplitting<4, 64, 192>(Offset);
1763+
default:
1764+
return false;
1765+
}
1766+
}
1767+
case AIE2P::G_AIE_OFFSET_SEXTLOAD:
1768+
case AIE2P::G_AIE_OFFSET_ZEXTLOAD:
1769+
case AIE2P::G_AIE_POSTINC_ZEXTLOAD:
1770+
case AIE2P::G_AIE_POSTINC_SEXTLOAD: {
1771+
switch (LoadStoreSize) {
1772+
case 8:
1773+
return checkSignedImmediateRange<4, 1>(Offset);
1774+
case 16:
1775+
return checkSignedImmediateRange<4, 2>(Offset);
1776+
default:
1777+
return false;
1778+
}
1779+
}
1780+
case AIE2P::G_AIE_POSTINC_STORE:
1781+
case AIE2P::G_AIE_POSTINC_LOAD: {
1782+
switch (LoadStoreSize) {
1783+
case 8:
1784+
return checkSignedImmediateRange<4, 1>(Offset);
1785+
case 16:
1786+
return checkSignedImmediateRange<4, 2>(Offset);
1787+
case 20:
1788+
case 32:
1789+
return checkSignedImmediateRange<4, 4>(Offset);
1790+
case 128:
1791+
return checkSignedImmediateRange<4, 16>(Offset);
1792+
case 256:
1793+
return checkSignedImmediateRange<4, 32>(Offset);
1794+
case 512:
1795+
case 1024:
1796+
case 2048:
1797+
return checkSignedImmediateRange<4, 64>(Offset);
1798+
default:
1799+
return false;
1800+
}
1801+
}
1802+
default:
1803+
return false;
1804+
}
1805+
}
1806+
17361807
unsigned AIE2PInstrInfo::getGenericAddVectorEltOpcode() const {
17371808
return AIE2P::G_AIE_ADD_VECTOR_ELT_HI;
17381809
}

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,6 +110,9 @@ class AIE2PInstrInfo : public AIE2PGenInstrInfo {
110110

111111
virtual std::optional<ZOLSupport> getZOLSupport() const override;
112112

113+
bool isOffsetInImmediateRange(unsigned Opcode, unsigned LoadStoreSize,
114+
std::optional<APInt> Immediate) const override;
115+
113116
unsigned getNumBypassedCycles(const InstrItineraryData *ItinData,
114117
const MachineInstr &DefMI, unsigned DefIdx,
115118
const MachineInstr &UseMI,

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