[AIEX] Add base test for top-down scoreboard single initialization

Author: andcarminati

llvm/test/CodeGen/AIE/schedule/sched-initialize-topscb-once.ll

@@ -0,0 +1,101 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+;
+; This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
+; (c) Copyright 2025 Advanced Micro Devices, Inc. or its affiliates
+; RUN: llc -mtriple=aie2p < %s | FileCheck %s
+
+define void @load_store_with_call() {
+; CHECK-LABEL: load_store_with_call:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    movxm ls, #.LBB0_1
+; CHECK-NEXT:    paddxm [sp], #64
+; CHECK-NEXT:    mova r0, #0; nopb ; movxm le, #.L_LEnd0; st lr, [sp, #-64] // 4-byte Folded Spill
+; CHECK-NEXT:    mova p5, #0; add.nc lc, r0, #-7
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; nops ; nopxm ; nopv
+; CHECK-NEXT:  .LBB0_1: // %for.body
+; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:  .L_LEnd0:
+; CHECK-NEXT:    nopa ; vldb x0, [p5, #0]; vst x0, [p5, #0]; nopxm ; nopv
+; CHECK-NEXT:  // %bb.2: // %exit
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    vst x0, [p5, #0]
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    mova p0, #0
+; CHECK-NEXT:    jl p5
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    mova p1, #0 // Delay Slot 4
+; CHECK-NEXT:    mova p2, #0 // Delay Slot 3
+; CHECK-NEXT:    mova p3, #0 // Delay Slot 2
+; CHECK-NEXT:    mova p4, #0 // Delay Slot 1
+; CHECK-NEXT:    lda lr, [sp, #-64]; nopb ; nops ; nopxm ; nopv // 4-byte Folded Reload
+; CHECK-NEXT:    nopx
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    paddxm [sp], #-64 // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  call void @llvm.set.loop.iterations.i32(i32 0)
+  br label %for.body
+
+for.body:                                 ; preds = %for.body, %entry
+  %0 = load <64 x i8>, ptr addrspace(5) null, align 64, !noalias !0
+  store <64 x i8> %0, ptr addrspace(6) null, align 64, !alias.scope !13
+  %1 = call i1 @llvm.loop.decrement.i32(i32 0)
+  br i1 %1, label %for.body, label %exit, !llvm.loop !14
+
+exit: ; preds = %for.body
+  tail call void null(ptr null, ptr null, ptr null, ptr null, ptr null)
+  %2 = load i32, ptr null, align 4
+  ret void
+}
+
+; Function Attrs: nocallback noduplicate nofree nosync nounwind willreturn
+declare void @llvm.set.loop.iterations.i32(i32) #0
+
+; Function Attrs: nocallback noduplicate nofree nosync nounwind willreturn
+declare i1 @llvm.loop.decrement.i32(i32) #0
+
+attributes #0 = { nocallback noduplicate nofree nosync nounwind willreturn }
+
+!0 = !{!7, !9}
+!7 = distinct !{!7, !8, !"param1: %in"}
+!8 = distinct !{!8, !"param1"}
+!9 = distinct !{!9, !10, !"param2: %matA"}
+!10 = distinct !{!10, !"param2"}
+!13 = !{!7, !9}
+!14 = distinct !{!14, !15, !16}
+!15 = !{!"llvm.loop.mustprogress"}
+!16 = !{!"llvm.loop.itercount.range", i64 8}