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Martien de Jong
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[AIE] Use ConflictBits in bundle conflict test
1 parent 71611db commit 8ba1b10

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2 files changed

+40
-23
lines changed

2 files changed

+40
-23
lines changed

llvm/lib/Target/AIE/AIEBundle.h

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -91,10 +91,15 @@ template <class I> class Bundle {
9191
// Verify there is a format that can accommodate the new slots
9292
MCSlotKind Slot = FormatInterface->getSlotKind(InstOpCode);
9393
assert(Slot != MCSlotKind());
94-
SlotBits NewSlots = FormatInterface->getSlotInfo(Slot)->getSlotSet();
95-
return (OccupiedSlots & NewSlots) == 0 &&
96-
FormatInterface->getPacketFormats().getFormat(OccupiedSlots |
97-
NewSlots);
94+
95+
auto *SlotInfo = FormatInterface->getSlotInfo(Slot);
96+
// ConflictBits is a fast predictor of missing formats
97+
SlotBits ConflictBits = SlotInfo->getConflictSet();
98+
if (OccupiedSlots & ConflictBits) {
99+
return false;
100+
}
101+
SlotBits NewSlots = OccupiedSlots | SlotInfo->getSlotSet();
102+
return FormatInterface->getPacketFormats().getFormat(NewSlots);
98103
}
99104

100105
/// Add an instruction to the bundle

llvm/test/TableGen/CodeGenFormat/SlotLogicTests/slot_conflicts.td

Lines changed: 31 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -12,22 +12,23 @@
1212
// We have the slots A. X, M and XM, which interfere like the
1313
// corresponding slots on typical AIE architectures.
1414
// We compute conflicts from the totality of formats, and we should find
15-
// conflicts
16-
// X -> {XM},
17-
// M -> {XM},
15+
// conflicts
16+
// X -> {X, XM},
17+
// M -> {M, XM},
1818
// XM -> {X, M, XM}
19-
// and nothing more. In particular, ConflictBits of A should be equal to its SlotBits
19+
// A -> {A}
20+
// and nothing more.
2021

2122
// CHECK-LABEL: "X",
22-
// CHECK-NEXT: 10,
23+
// CHECK-NEXT: 8,
2324
// CHECK-NEXT: 1,
2425
// CHECK-NEXT: 5,
2526
// CHECK-LABEL: "A",
2627
// CHECK-NEXT: 10,
2728
// CHECK-NEXT: 2,
2829
// CHECK-NEXT: 2,
2930
// CHECK-LABEL: "XM",
30-
// CHECK-NEXT: 20,
31+
// CHECK-NEXT: 18,
3132
// CHECK-NEXT: 4,
3233
// CHECK-NEXT: 13,
3334
// CHECK-LABEL: "M",
@@ -45,9 +46,9 @@ include "llvm/Target/CodeGenFormat.td"
4546
let Namespace = "TEST" in {
4647
def nop_slot : InstSlot<"nop", 14> { let Artificial = true; }
4748
def lda_slot : InstSlot<"A", 10>;
48-
def alu_slot : InstSlot<"X", 10>;
49+
def alu_slot : InstSlot<"X", 8>;
4950
def mov_slot : InstSlot<"M", 10>;
50-
def lng_slot : InstSlot<"XM", 20>;
51+
def lng_slot : InstSlot<"XM", 18>;
5152
}
5253

5354

@@ -64,14 +65,14 @@ def TESTCodeGenFormat : CodeGenFormat {
6465
let Namespace = "TEST" in
6566
def default_slot : InstSlot<"default", 0, true>;
6667

67-
class TESTInst<dag outs, dag ins, string opcodestr, string argstr, list<dag> pattern>
68+
class TESTInst<dag outs, dag ins, string opc, string arg, list<dag> pattern>
6869
: Instruction, InstFormat
6970
{
7071
let Namespace = "TEST";
7172

7273
dag OutOperandList = outs;
7374
dag InOperandList = ins;
74-
let AsmString = opcodestr # "\t" # argstr;
75+
let AsmString = opc # "\t" # arg;
7576
let Pattern = pattern;
7677

7778
let Slot = default_slot;
@@ -83,29 +84,40 @@ class TESTSubInst<dag outs, dag ins>
8384
let isComposite = false;
8485
}
8586

86-
class TESTPacketFormat<dag outs, dag ins> : TESTInst<outs, ins,"", "", []> {
87+
class TESTFormat<dag outs, dag ins> : TESTInst<outs, ins, "", "", []> {
8788
let isComposite = true;
8889
}
8990

9091

91-
class TEST_instr32<dag outs, dag ins> : TESTPacketFormat<outs, ins> {
92+
class TEST_I32<dag outs, dag ins> : TESTFormat<outs, ins> {
9293
field bits<32> Inst;
9394
field bits<32> instr32;
9495
let Inst = {instr32};
9596
}
9697

97-
def I64_A_XM : TEST_instr32<(outs), (ins lda_slot:$lda, lng_slot:$lng)> {
98+
def I32_A_XM : TEST_I32<(outs), (ins lda_slot:$lda, lng_slot:$lng)> {
9899
bits<10> lda;
99-
bits<20> lng;
100-
let instr32 = {lda, lng, 0b00};
101-
100+
bits<18> lng;
101+
let instr32 = {lda, lng, 0b1001};
102102
}
103103

104-
def I64_A_X_M : TEST_instr32<(outs), (ins lda_slot:$lda, alu_slot:$alu, mov_slot:$mov)> {
104+
def I32_A_X : TEST_I32<(outs), (ins lda_slot:$lda, alu_slot:$alu)> {
105105
bits<10> lda;
106-
bits<10> alu;
106+
bits<8> alu;
107+
let instr32 = {lda, alu, 0b0000000000, 0b1001};
108+
}
109+
110+
def I32 : TEST_I32<(outs), (ins alu_slot:$alu, mov_slot:$mov)> {
111+
bits<8> alu;
107112
bits<10> mov;
108-
let instr32 = {lda, alu, mov, 0b01};
113+
let instr32 = {0b0000000000, alu, mov, 0b0110};
109114
}
110115

116+
def I32 : TEST_I32<(outs),
117+
(ins lda_slot:$lda, alu_slot:$alu, mov_slot:$mov)> {
118+
bits<10> lda;
119+
bits<8> alu;
120+
bits<10> mov;
121+
let instr32 = {lda, alu, mov, 0b1110};
122+
}
111123

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