|
| 1 | +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| 2 | +# |
| 3 | +# This file is licensed under the Apache License v2.0 with LLVM Exceptions. |
| 4 | +# See https://llvm.org/LICENSE.txt for license information. |
| 5 | +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | +# |
| 7 | +# (c) Copyright 2025 Advanced Micro Devices, Inc. or its affiliates |
| 8 | + |
| 9 | +# RUN: llc -O2 -mtriple=aie2p -verify-machineinstrs -start-before=greedy \ |
| 10 | +# RUN: -stop-after=aie-unallocated-superreg-rewrite %s -o - | FileCheck %s |
| 11 | + |
| 12 | +# This example exposes some bundled copies that should be expanded. Please note |
| 13 | +# that the bundled copies related to 3d instructions should not be expanded here |
| 14 | +# because they already have physical registers assigned (are allocated). |
| 15 | + |
| 16 | +--- |
| 17 | +name: test_expand_copy_bundle |
| 18 | +alignment: 16 |
| 19 | +tracksRegLiveness: true |
| 20 | +body: | |
| 21 | + ; CHECK-LABEL: name: test_expand_copy_bundle |
| 22 | + ; CHECK: bb.0: |
| 23 | + ; CHECK-NEXT: successors: %bb.1(0x80000000) |
| 24 | + ; CHECK-NEXT: {{ $}} |
| 25 | + ; CHECK-NEXT: [[MOV_PD_imm11_pseudo:%[0-9]+]]:em_as_32bit = MOV_PD_imm11_pseudo 0 |
| 26 | + ; CHECK-NEXT: [[COPY:%[0-9]+]]:edjl = COPY [[MOV_PD_imm11_pseudo]] |
| 27 | + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ednl = COPY [[MOV_PD_imm11_pseudo]] |
| 28 | + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ednh = COPY [[MOV_PD_imm11_pseudo]] |
| 29 | + ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub_dim_size:eds = COPY [[MOV_PD_imm11_pseudo]] |
| 30 | + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub_dim_count:eds = COPY [[MOV_PD_imm11_pseudo]] |
| 31 | + ; CHECK-NEXT: [[MOV_RLC_imm11_pseudo:%[0-9]+]]:erf2 = MOV_RLC_imm11_pseudo 0 |
| 32 | + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub_hi_dim_then_sub_dim_size:eds = COPY [[MOV_PD_imm11_pseudo]] |
| 33 | + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub_hi_dim_then_sub_dim_count:eds = COPY [[MOV_PD_imm11_pseudo]] |
| 34 | + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub_mod:eds = COPY [[MOV_PD_imm11_pseudo]] |
| 35 | + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub_dim_stride:eds = COPY [[COPY]] |
| 36 | + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub_hi_dim_then_sub_dim_stride:eds = COPY [[COPY]] |
| 37 | + ; CHECK-NEXT: undef [[VBCST_32_:%[0-9]+]].sub_512_lo:vec1024 = VBCST_32 [[MOV_RLC_imm11_pseudo]] |
| 38 | + ; CHECK-NEXT: [[COPY4:%[0-9]+]]:ednl = COPY [[MOV_PD_imm11_pseudo]] |
| 39 | + ; CHECK-NEXT: [[COPY5:%[0-9]+]]:ednh = COPY [[MOV_PD_imm11_pseudo]] |
| 40 | + ; CHECK-NEXT: [[COPY6:%[0-9]+]]:ednl = COPY [[MOV_PD_imm11_pseudo]] |
| 41 | + ; CHECK-NEXT: [[COPY7:%[0-9]+]]:edch = COPY [[MOV_PD_imm11_pseudo]] |
| 42 | + ; CHECK-NEXT: [[COPY8:%[0-9]+]]:edcl = COPY [[MOV_PD_imm11_pseudo]] |
| 43 | + ; CHECK-NEXT: [[COPY9:%[0-9]+]]:edch = COPY [[MOV_PD_imm11_pseudo]] |
| 44 | + ; CHECK-NEXT: [[COPY10:%[0-9]+]]:edcl = COPY [[MOV_PD_imm11_pseudo]] |
| 45 | + ; CHECK-NEXT: [[COPY11:%[0-9]+]]:edcl = COPY [[MOV_PD_imm11_pseudo]] |
| 46 | + ; CHECK-NEXT: [[COPY12:%[0-9]+]]:edch = COPY [[MOV_PD_imm11_pseudo]] |
| 47 | + ; CHECK-NEXT: [[VBCST_32_:%[0-9]+]].sub_512_hi:vec1024 = COPY [[VBCST_32_]].sub_512_lo |
| 48 | + ; CHECK-NEXT: [[COPY13:%[0-9]+]]:eldfiforeg = COPY [[VBCST_32_]] |
| 49 | + ; CHECK-NEXT: [[MOV_PD_imm11_pseudo1:%[0-9]+]]:eps = MOV_PD_imm11_pseudo 0 |
| 50 | + ; CHECK-NEXT: {{ $}} |
| 51 | + ; CHECK-NEXT: bb.1: |
| 52 | + ; CHECK-NEXT: successors: %bb.1(0x80000000) |
| 53 | + ; CHECK-NEXT: {{ $}} |
| 54 | + ; CHECK-NEXT: [[COPY14:%[0-9]+]]:edjh = COPY [[COPY]] |
| 55 | + ; CHECK-NEXT: [[MOV_PD_imm11_pseudo2:%[0-9]+]]:ep = MOV_PD_imm11_pseudo 0 |
| 56 | + ; CHECK-NEXT: dead [[MOV_PD_imm11_pseudo2:%[0-9]+]]:ep, dead [[COPY11:%[0-9]+]]:edcl, [[COPY12:%[0-9]+]]:edch = PADD_3D_pseudo_split [[MOV_PD_imm11_pseudo2]], [[MOV_PD_imm11_pseudo]], [[COPY1]], [[COPY]], [[COPY11]], undef %29:em_as_32bit, [[COPY2]], [[COPY14]], [[COPY12]] |
| 57 | + ; CHECK-NEXT: [[COPY15:%[0-9]+]]:eds = COPY [[COPY3]] |
| 58 | + ; CHECK-NEXT: undef [[COPY16:%[0-9]+]].sub_ptr:epsrfldf = COPY [[MOV_PD_imm11_pseudo1]] |
| 59 | + ; CHECK-NEXT: [[COPY16:%[0-9]+]].sub_fifo:epsrfldf = COPY [[COPY13]] |
| 60 | + ; CHECK-NEXT: [[COPY16:%[0-9]+]].sub_avail:epsrfldf = COPY [[MOV_RLC_imm11_pseudo]] |
| 61 | + ; CHECK-NEXT: [[COPY17:%[0-9]+]]:spill_edn_to_er = COPY [[COPY4]] { |
| 62 | + ; CHECK-NEXT: internal %56:spill_edn_to_er = COPY [[COPY5]] |
| 63 | + ; CHECK-NEXT: } |
| 64 | + ; CHECK-NEXT: undef [[COPY18:%[0-9]+]].sub_lo_dim:eds = COPY [[COPY15]].sub_lo_dim { |
| 65 | + ; CHECK-NEXT: internal [[COPY18]].sub_hi_dim_then_sub_dim_count:eds = COPY [[COPY15]].sub_hi_dim_then_sub_dim_count |
| 66 | + ; CHECK-NEXT: internal [[COPY18]].sub_hi_dim_then_sub_dim_size:eds = COPY [[COPY15]].sub_hi_dim_then_sub_dim_size |
| 67 | + ; CHECK-NEXT: internal [[COPY18]].sub_hi_dim_then_sub_dim_stride:eds = COPY [[COPY15]].sub_hi_dim_then_sub_dim_stride |
| 68 | + ; CHECK-NEXT: } |
| 69 | + ; CHECK-NEXT: dead [[VLD_POP_576_3D_pseudo_split:%[0-9]+]]:vec576, dead [[COPY16:%[0-9]+]].sub_ptr:epsrfldf, dead [[COPY16:%[0-9]+]].sub_fifo:epsrfldf, dead [[COPY16:%[0-9]+]].sub_avail:epsrfldf, [[COPY18:%[0-9]+]].sub_dim_count:eds, [[COPY18:%[0-9]+]].sub_hi_dim_then_sub_dim_count:eds = VLD_POP_576_3D_pseudo_split [[COPY16]].sub_ptr, [[COPY16]].sub_fifo, [[COPY16]].sub_avail, [[COPY18]].sub_mod, [[COPY18]].sub_dim_size, [[COPY18]].sub_dim_stride, [[COPY18]].sub_dim_count, undef [[COPY18]].sub_hi_dim_then_sub_mod, [[COPY18]].sub_hi_dim_then_sub_dim_size, [[COPY18]].sub_hi_dim_then_sub_dim_stride, [[COPY18]].sub_hi_dim_then_sub_dim_count, implicit-def $srfifo_uf :: (load unknown-size from `ptr addrspace(5) null`, align 1, addrspace 5) |
| 70 | + ; CHECK-NEXT: [[COPY19:%[0-9]+]]:spill_edc_to_er = COPY [[COPY18]].sub_dim_count { |
| 71 | + ; CHECK-NEXT: internal %55:spill_edc_to_er = COPY [[COPY18]].sub_hi_dim_then_sub_dim_count |
| 72 | + ; CHECK-NEXT: } |
| 73 | + ; CHECK-NEXT: [[COPY4:%[0-9]+]]:ednl = COPY [[COPY17]] { |
| 74 | + ; CHECK-NEXT: internal [[COPY5]]:ednh = COPY %56 |
| 75 | + ; CHECK-NEXT: } |
| 76 | + ; CHECK-NEXT: [[COPY20:%[0-9]+]]:em_as_32bit = COPY [[MOV_PD_imm11_pseudo]] |
| 77 | + ; CHECK-NEXT: [[COPY21:%[0-9]+]]:edjl = COPY [[COPY]] |
| 78 | + ; CHECK-NEXT: [[COPY22:%[0-9]+]]:edcl = COPY [[COPY19]] |
| 79 | + ; CHECK-NEXT: [[COPY23:%[0-9]+]]:edjh = COPY [[COPY]] |
| 80 | + ; CHECK-NEXT: [[COPY24:%[0-9]+]]:edch = COPY %55 |
| 81 | + ; CHECK-NEXT: undef [[COPY25:%[0-9]+]].sub_ptr:epsrfldf = COPY [[MOV_PD_imm11_pseudo1]] |
| 82 | + ; CHECK-NEXT: [[COPY25:%[0-9]+]].sub_fifo:epsrfldf = COPY [[COPY13]] |
| 83 | + ; CHECK-NEXT: [[COPY25:%[0-9]+]].sub_avail:epsrfldf = COPY [[MOV_RLC_imm11_pseudo]] |
| 84 | + ; CHECK-NEXT: dead [[VLD_POP_576_3D_pseudo_split1:%[0-9]+]]:vec576, dead [[COPY25:%[0-9]+]].sub_ptr:epsrfldf, dead [[COPY25:%[0-9]+]].sub_fifo:epsrfldf, dead [[COPY25:%[0-9]+]].sub_avail:epsrfldf, dead [[COPY22:%[0-9]+]]:edcl, dead [[COPY24:%[0-9]+]]:edch = VLD_POP_576_3D_pseudo_split [[COPY25]].sub_ptr, [[COPY25]].sub_fifo, [[COPY25]].sub_avail, [[COPY20]], [[COPY4]], [[COPY21]], [[COPY22]], undef %53:em_as_32bit, [[COPY5]], [[COPY23]], [[COPY24]], implicit-def $srfifo_uf :: (load unknown-size from `ptr addrspace(5) null`, align 1, addrspace 5) |
| 85 | + ; CHECK-NEXT: [[MOV_PD_imm11_pseudo3:%[0-9]+]]:ep = MOV_PD_imm11_pseudo 0 |
| 86 | + ; CHECK-NEXT: [[COPY26:%[0-9]+]]:ednh = COPY [[MOV_PD_imm11_pseudo]] |
| 87 | + ; CHECK-NEXT: [[COPY27:%[0-9]+]]:em_as_32bit = COPY [[MOV_PD_imm11_pseudo]] |
| 88 | + ; CHECK-NEXT: [[COPY28:%[0-9]+]]:edjl = COPY [[COPY]] |
| 89 | + ; CHECK-NEXT: [[COPY29:%[0-9]+]]:edjh = COPY [[COPY]] |
| 90 | + ; CHECK-NEXT: dead [[MOV_PD_imm11_pseudo3:%[0-9]+]]:ep, dead [[COPY8:%[0-9]+]]:edcl, [[COPY7:%[0-9]+]]:edch = PADD_3D_pseudo_split [[MOV_PD_imm11_pseudo3]], [[COPY27]], [[COPY6]], [[COPY28]], [[COPY8]], undef %37:em_as_32bit, [[COPY26]], [[COPY29]], [[COPY7]] |
| 91 | + ; CHECK-NEXT: [[COPY30:%[0-9]+]]:em_as_32bit = COPY [[MOV_PD_imm11_pseudo]] |
| 92 | + ; CHECK-NEXT: [[COPY31:%[0-9]+]]:ednl = COPY [[COPY26]] |
| 93 | + ; CHECK-NEXT: [[COPY32:%[0-9]+]]:edjl = COPY [[COPY]] |
| 94 | + ; CHECK-NEXT: [[COPY33:%[0-9]+]]:ednh = COPY [[COPY26]] |
| 95 | + ; CHECK-NEXT: [[COPY8:%[0-9]+]]:edcl = MOV_PD_imm11_pseudo 1 |
| 96 | + ; CHECK-NEXT: [[MOV_PD_imm11_pseudo4:%[0-9]+]]:ep = MOV_PD_imm11_pseudo 0 |
| 97 | + ; CHECK-NEXT: [[COPY34:%[0-9]+]]:edjh = COPY [[COPY]] |
| 98 | + ; CHECK-NEXT: dead [[MOV_PD_imm11_pseudo4:%[0-9]+]]:ep, dead [[COPY10:%[0-9]+]]:edcl, [[COPY9:%[0-9]+]]:edch = PADD_3D_pseudo_split [[MOV_PD_imm11_pseudo4]], [[COPY30]], [[COPY31]], [[COPY32]], [[COPY10]], undef %45:em_as_32bit, [[COPY33]], [[COPY34]], [[COPY9]] |
| 99 | + ; CHECK-NEXT: [[COPY10:%[0-9]+]]:edcl = MOV_PD_imm11_pseudo 1 |
| 100 | + ; CHECK-NEXT: [[COPY11:%[0-9]+]]:edcl = MOV_PD_imm11_pseudo 1 |
| 101 | + ; CHECK-NEXT: PseudoJ_jump_imm %bb.1 |
| 102 | + bb.0: |
| 103 | + successors: %bb.1(0x80000000) |
| 104 | +
|
| 105 | + undef %90.sub_mod:eds = MOV_PD_imm11_pseudo 0 |
| 106 | + %90.sub_dim_stride:eds = COPY %90.sub_mod |
| 107 | + %90.sub_dim_size:eds = COPY %90.sub_mod |
| 108 | + %90.sub_hi_dim_then_sub_dim_size:eds = COPY %90.sub_mod |
| 109 | + undef %83.sub_dim_size:eds = COPY %90.sub_mod |
| 110 | + %83.sub_dim_count:eds = COPY %90.sub_mod |
| 111 | + %22:erf2 = MOV_RLC_imm11_pseudo 0 |
| 112 | + %83.sub_hi_dim_then_sub_dim_size:eds = COPY %90.sub_mod |
| 113 | + %83.sub_hi_dim_then_sub_dim_count:eds = COPY %90.sub_mod |
| 114 | + %83.sub_mod:eds = COPY %90.sub_mod |
| 115 | + %83.sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 116 | + %83.sub_hi_dim_then_sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 117 | + undef %21.sub_512_lo:vec1024 = VBCST_32 %22 |
| 118 | + undef %77.sub_dim_size:eds = COPY %90.sub_mod |
| 119 | + %77.sub_hi_dim_then_sub_dim_size:eds = COPY %90.sub_mod |
| 120 | + undef %71.sub_dim_size:eds = COPY %90.sub_mod |
| 121 | + %71.sub_hi_dim_then_sub_dim_count:eds = COPY %90.sub_mod |
| 122 | + %71.sub_dim_count:eds = COPY %90.sub_mod |
| 123 | + undef %66.sub_hi_dim_then_sub_dim_count:eds = COPY %90.sub_mod |
| 124 | + %66.sub_dim_count:eds = COPY %90.sub_mod |
| 125 | + %90.sub_dim_count:eds = COPY %90.sub_mod |
| 126 | + %90.sub_hi_dim_then_sub_dim_count:eds = COPY %90.sub_mod |
| 127 | + %21.sub_512_hi:vec1024 = COPY %21.sub_512_lo |
| 128 | + %64:eldfiforeg = COPY %21 |
| 129 | + %20:eps = MOV_PD_imm11_pseudo 0 |
| 130 | +
|
| 131 | + bb.1: |
| 132 | + successors: %bb.1(0x80000000) |
| 133 | +
|
| 134 | + %90.sub_hi_dim_then_sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 135 | + %8:ep = MOV_PD_imm11_pseudo 0 |
| 136 | + dead %8:ep, %90.sub_dim_count:eds, %90.sub_hi_dim_then_sub_dim_count:eds = PADD_3D_pseudo_split %8, %90.sub_mod, %90.sub_dim_size, %90.sub_dim_stride, %90.sub_dim_count, undef %90.sub_hi_dim_then_sub_mod, %90.sub_hi_dim_then_sub_dim_size, %90.sub_hi_dim_then_sub_dim_stride, %90.sub_hi_dim_then_sub_dim_count |
| 137 | + %104:eds = COPY %83 |
| 138 | + undef %103.sub_ptr:epsrfldf = COPY %20 |
| 139 | + %103.sub_fifo:epsrfldf = COPY %64 |
| 140 | + %103.sub_avail:epsrfldf = COPY %22 |
| 141 | + dead %82:vec576, dead %103.sub_ptr:epsrfldf, dead %103.sub_fifo:epsrfldf, dead %103.sub_avail:epsrfldf, %104.sub_dim_count:eds, %104.sub_hi_dim_then_sub_dim_count:eds = VLD_POP_576_3D_pseudo_split %103.sub_ptr, %103.sub_fifo, %103.sub_avail, %104.sub_mod, %104.sub_dim_size, %104.sub_dim_stride, %104.sub_dim_count, undef %104.sub_hi_dim_then_sub_mod, %104.sub_hi_dim_then_sub_dim_size, %104.sub_hi_dim_then_sub_dim_stride, %104.sub_hi_dim_then_sub_dim_count, implicit-def $srfifo_uf :: (load unknown-size from `ptr addrspace(5) null`, align 1, addrspace 5) |
| 142 | + %77.sub_mod:eds = COPY %90.sub_mod |
| 143 | + %77.sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 144 | + %77.sub_dim_count:eds = COPY %104.sub_dim_count |
| 145 | + %77.sub_hi_dim_then_sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 146 | + %77.sub_hi_dim_then_sub_dim_count:eds = COPY %104.sub_hi_dim_then_sub_dim_count |
| 147 | + undef %105.sub_ptr:epsrfldf = COPY %20 |
| 148 | + %105.sub_fifo:epsrfldf = COPY %64 |
| 149 | + %105.sub_avail:epsrfldf = COPY %22 |
| 150 | + dead %76:vec576, dead %105.sub_ptr:epsrfldf, dead %105.sub_fifo:epsrfldf, dead %105.sub_avail:epsrfldf, %77.sub_dim_count:eds, %77.sub_hi_dim_then_sub_dim_count:eds = VLD_POP_576_3D_pseudo_split %105.sub_ptr, %105.sub_fifo, %105.sub_avail, %77.sub_mod, %77.sub_dim_size, %77.sub_dim_stride, %77.sub_dim_count, undef %77.sub_hi_dim_then_sub_mod, %77.sub_hi_dim_then_sub_dim_size, %77.sub_hi_dim_then_sub_dim_stride, %77.sub_hi_dim_then_sub_dim_count, implicit-def $srfifo_uf :: (load unknown-size from `ptr addrspace(5) null`, align 1, addrspace 5) |
| 151 | + %33:ep = MOV_PD_imm11_pseudo 0 |
| 152 | + %71.sub_hi_dim_then_sub_dim_size:eds = COPY %90.sub_mod |
| 153 | + %71.sub_mod:eds = COPY %90.sub_mod |
| 154 | + %71.sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 155 | + %71.sub_hi_dim_then_sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 156 | + dead %33:ep, %71.sub_dim_count:eds, %71.sub_hi_dim_then_sub_dim_count:eds = PADD_3D_pseudo_split %33, %71.sub_mod, %71.sub_dim_size, %71.sub_dim_stride, %71.sub_dim_count, undef %71.sub_hi_dim_then_sub_mod, %71.sub_hi_dim_then_sub_dim_size, %71.sub_hi_dim_then_sub_dim_stride, %71.sub_hi_dim_then_sub_dim_count |
| 157 | + %66.sub_mod:eds = COPY %90.sub_mod |
| 158 | + %66.sub_dim_size:eds = COPY %71.sub_hi_dim_then_sub_dim_size |
| 159 | + %66.sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 160 | + %66.sub_hi_dim_then_sub_dim_size:eds = COPY %71.sub_hi_dim_then_sub_dim_size |
| 161 | + %71.sub_dim_count:eds = MOV_PD_imm11_pseudo 1 |
| 162 | + %39:ep = MOV_PD_imm11_pseudo 0 |
| 163 | + %66.sub_hi_dim_then_sub_dim_stride:eds = COPY %90.sub_dim_stride |
| 164 | + dead %39:ep, %66.sub_dim_count:eds, %66.sub_hi_dim_then_sub_dim_count:eds = PADD_3D_pseudo_split %39, %66.sub_mod, %66.sub_dim_size, %66.sub_dim_stride, %66.sub_dim_count, undef %66.sub_hi_dim_then_sub_mod, %66.sub_hi_dim_then_sub_dim_size, %66.sub_hi_dim_then_sub_dim_stride, %66.sub_hi_dim_then_sub_dim_count |
| 165 | + %66.sub_dim_count:eds = MOV_PD_imm11_pseudo 1 |
| 166 | + %90.sub_dim_count:eds = MOV_PD_imm11_pseudo 1 |
| 167 | + PseudoJ_jump_imm %bb.1 |
| 168 | +
|
| 169 | +... |
0 commit comments