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krishnamtibrewalakrishnamtibrewala
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[AIE2x] sub_hi_dim_then_sub_mod not required for 3D register
1 parent c6bc5a8 commit a681b6e

18 files changed

+271
-287
lines changed

‎llvm/lib/Target/AIE/AIE2InstrInfo.cpp‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -835,7 +835,6 @@ AIE2InstrInfo::getSpillPseudoExpandInfo(const MachineInstr &MI) const {
835835
{AIE2::LDA_dms_spill, AIE2::sub_dim_size},
836836
{AIE2::LDA_dms_spill, AIE2::sub_dim_stride},
837837
{AIE2::LDA_dms_spill, AIE2::sub_dim_count},
838-
{AIE2::LDA_dms_spill, AIE2::sub_hi_dim_then_sub_mod},
839838
{AIE2::LDA_dms_spill, AIE2::sub_hi_dim_then_sub_dim_size},
840839
{AIE2::LDA_dms_spill, AIE2::sub_hi_dim_then_sub_dim_stride},
841840
{AIE2::LDA_dms_spill, AIE2::sub_hi_dim_then_sub_dim_count}};
@@ -844,7 +843,6 @@ AIE2InstrInfo::getSpillPseudoExpandInfo(const MachineInstr &MI) const {
844843
{AIE2::ST_dms_spill, AIE2::sub_dim_size},
845844
{AIE2::ST_dms_spill, AIE2::sub_dim_stride},
846845
{AIE2::ST_dms_spill, AIE2::sub_dim_count},
847-
{AIE2::ST_dms_spill, AIE2::sub_hi_dim_then_sub_mod},
848846
{AIE2::ST_dms_spill, AIE2::sub_hi_dim_then_sub_dim_size},
849847
{AIE2::ST_dms_spill, AIE2::sub_hi_dim_then_sub_dim_stride},
850848
{AIE2::ST_dms_spill, AIE2::sub_hi_dim_then_sub_dim_count}};
@@ -1205,7 +1203,6 @@ AIE2InstrInfo::getTiedRegInfo(unsigned Opcode) const {
12051203
SubRegSplit(AIE2::sub_dim_size),
12061204
SubRegSplit(AIE2::sub_dim_stride),
12071205
SubRegSplit(AIE2::sub_dim_count),
1208-
SubRegSplit(AIE2::sub_hi_dim_then_sub_mod, /*IsUndef=*/true),
12091206
SubRegSplit(AIE2::sub_hi_dim_then_sub_dim_size),
12101207
SubRegSplit(AIE2::sub_hi_dim_then_sub_dim_stride),
12111208
SubRegSplit(AIE2::sub_hi_dim_then_sub_dim_count)};

‎llvm/lib/Target/AIE/AIE2InstrInfo.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -605,7 +605,7 @@ foreach instr = [VST_2D_SRS_D8_S32, VST_2D_SRS_D16_S64, VST_2D_SRS_D16_S32,
605605
// Define _split variants for instructions using 3D registers
606606
class Split3DInstr<Instruction RealInst, int opidx> : SplitPseudo<RealInst,
607607
opidx, (ins eM:$mod1, eDN:$dim_size1, eDJ:$dim_stride1, eDC:$dim_count1,
608-
eM:$mod2, eDN:$dim_size2, eDJ:$dim_stride2, eDC:$dim_count2)> {}
608+
eDN:$dim_size2, eDJ:$dim_stride2, eDC:$dim_count2)> {}
609609
foreach instr = [VLDA_3D_dmw_lda_w, VLDA_3D_dmw_lda_am, VLDA_3D_CONV_FP32_BF16,
610610
VLDB_3D, VLDB_3D_128, LDA_3D_dmv_lda_q, VLDB_3D_UNPACK_S8_S4,
611611
VLDB_3D_UNPACK_S16_S8, VLDB_3D_UNPACK_D8_D4, VLDB_3D_UNPACK_D16_D8,

‎llvm/lib/Target/AIE/AIE2RegisterInfo.cpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -475,7 +475,6 @@ const std::set<int> &AIE2RegisterInfo::getSubRegSplit(int RegClassId) const {
475475
AIE2::sub_dim_size,
476476
AIE2::sub_dim_stride,
477477
AIE2::sub_dim_count,
478-
AIE2::sub_hi_dim_then_sub_mod,
479478
AIE2::sub_hi_dim_then_sub_dim_size,
480479
AIE2::sub_hi_dim_then_sub_dim_stride,
481480
AIE2::sub_hi_dim_then_sub_dim_count};

‎llvm/lib/Target/AIE/AIEBaseInstrInfo.cpp‎

Lines changed: 22 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -649,15 +649,29 @@ void AIEBaseInstrInfo::copyThroughSubRegs(MachineBasicBlock &MBB,
649649
MCRegister SrcReg,
650650
bool KillSrc) const {
651651
MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
652-
const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
653-
654-
SmallSet<MCRegister, 8> SrcSubRegs;
655-
collectSubRegs(SrcReg, SrcSubRegs, TRI);
652+
auto &TRI =
653+
*static_cast<const AIEBaseRegisterInfo *>(MRI.getTargetRegisterInfo());
654+
655+
const auto *RC = Register::isPhysicalRegister(SrcReg.id())
656+
? TRI.getMinimalPhysRegClass(SrcReg)
657+
: MRI.getRegClass(SrcReg);
658+
auto &SubRegSplit = TRI.getSubRegSplit(RC->getID());
659+
660+
if (SubRegSplit.size() > 1) {
661+
for (const auto &SubRegIdx : SubRegSplit) {
662+
MCRegister SrcSubReg = TRI.getSubReg(SrcReg, SubRegIdx);
663+
MCRegister DstSubReg = TRI.getSubReg(DstReg, SubRegIdx);
664+
copyPhysReg(MBB, MBBI, DL, DstSubReg, SrcSubReg, KillSrc);
665+
}
666+
} else {
667+
SmallSet<MCRegister, 8> SrcSubRegs;
668+
collectSubRegs(SrcReg, SrcSubRegs, TRI);
656669

657-
for (MCRegister SrcSubReg : SrcSubRegs) {
658-
unsigned SubRegIdx = TRI.getSubRegIndex(SrcReg, SrcSubReg);
659-
MCRegister DstSubReg = TRI.getSubReg(DstReg, SubRegIdx);
660-
copyPhysReg(MBB, MBBI, DL, DstSubReg, SrcSubReg, KillSrc);
670+
for (MCRegister SrcSubReg : SrcSubRegs) {
671+
unsigned SubRegIdx = TRI.getSubRegIndex(SrcReg, SrcSubReg);
672+
MCRegister DstSubReg = TRI.getSubReg(DstReg, SubRegIdx);
673+
copyPhysReg(MBB, MBBI, DL, DstSubReg, SrcSubReg, KillSrc);
674+
}
661675
}
662676
}
663677

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1051,7 +1051,6 @@ AIE2PInstrInfo::getSpillPseudoExpandInfo(const MachineInstr &MI) const {
10511051
{AIE2P::ST_dms_sts_spill, AIE2P::sub_dim_size},
10521052
{AIE2P::ST_dms_sts_spill, AIE2P::sub_dim_stride},
10531053
{AIE2P::ST_dms_sts_spill, AIE2P::sub_dim_count},
1054-
{AIE2P::ST_dms_sts_spill, AIE2P::sub_hi_dim_then_sub_mod},
10551054
{AIE2P::ST_dms_sts_spill, AIE2P::sub_hi_dim_then_sub_dim_size},
10561055
{AIE2P::ST_dms_sts_spill, AIE2P::sub_hi_dim_then_sub_dim_stride},
10571056
{AIE2P::ST_dms_sts_spill, AIE2P::sub_hi_dim_then_sub_dim_count}};
@@ -1089,7 +1088,6 @@ AIE2PInstrInfo::getSpillPseudoExpandInfo(const MachineInstr &MI) const {
10891088
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_dim_size},
10901089
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_dim_stride},
10911090
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_dim_count},
1092-
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_hi_dim_then_sub_mod},
10931091
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_hi_dim_then_sub_dim_size},
10941092
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_hi_dim_then_sub_dim_stride},
10951093
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_hi_dim_then_sub_dim_count}};
@@ -1277,7 +1275,6 @@ AIE2PInstrInfo::getTiedRegInfo(unsigned Opcode) const {
12771275
SubRegSplit(AIE2P::sub_dim_size),
12781276
SubRegSplit(AIE2P::sub_dim_stride),
12791277
SubRegSplit(AIE2P::sub_dim_count),
1280-
SubRegSplit(AIE2P::sub_hi_dim_then_sub_mod, /*IsUndef=*/true),
12811278
SubRegSplit(AIE2P::sub_hi_dim_then_sub_dim_size),
12821279
SubRegSplit(AIE2P::sub_hi_dim_then_sub_dim_stride),
12831280
SubRegSplit(AIE2P::sub_hi_dim_then_sub_dim_count)};

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -225,7 +225,7 @@ foreach instr = [
225225
// Define _split variants for instructions using 3D registers
226226
class Split3DInstr<Instruction RealInst, int opidx> : SplitPseudo<RealInst,
227227
opidx, (ins eM:$mod1, eDN:$dim_size1, eDJ:$dim_stride1, eDC:$dim_count1,
228-
eM:$mod2, eDN:$dim_size2, eDJ:$dim_stride2, eDC:$dim_count2)> {}
228+
eDN:$dim_size2, eDJ:$dim_stride2, eDC:$dim_count2)> {}
229229

230230
foreach instr = [PADDA_3D, PADDB_3D, PADDS_3D, PADD_3D_pseudo] in
231231
def instr # _split : Split3DInstr<instr, /*opidx=*/4>;

‎llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.cpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -505,7 +505,6 @@ const std::set<int> &AIE2PRegisterInfo::getSubRegSplit(int RegClassId) const {
505505
AIE2P::sub_dim_size,
506506
AIE2P::sub_dim_stride,
507507
AIE2P::sub_dim_count,
508-
AIE2P::sub_hi_dim_then_sub_mod,
509508
AIE2P::sub_hi_dim_then_sub_dim_size,
510509
AIE2P::sub_hi_dim_then_sub_dim_stride,
511510
AIE2P::sub_hi_dim_then_sub_dim_count};

‎llvm/test/CodeGen/AIE/aie2/postrapseudos/dim_spill.mir‎

Lines changed: 20 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -119,18 +119,16 @@ body: |
119119
; CHECK-NEXT: $dn1 = LDA_dms_spill -36, implicit $sp :: (load (s32) from %stack.0 + 4)
120120
; CHECK-NEXT: $dj1 = LDA_dms_spill -32, implicit $sp :: (load (s32) from %stack.0 + 8)
121121
; CHECK-NEXT: $dc1 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0 + 12)
122-
; CHECK-NEXT: $m5 = LDA_dms_spill -24, implicit $sp :: (load (s32) from %stack.0 + 16)
123-
; CHECK-NEXT: $dn5 = LDA_dms_spill -20, implicit $sp :: (load (s32) from %stack.0 + 20)
124-
; CHECK-NEXT: $dj5 = LDA_dms_spill -16, implicit $sp :: (load (s32) from %stack.0 + 24)
125-
; CHECK-NEXT: $dc5 = LDA_dms_spill -12, implicit $sp :: (load (s32) from %stack.0 + 28)
122+
; CHECK-NEXT: $dn5 = LDA_dms_spill -24, implicit $sp :: (load (s32) from %stack.0 + 16)
123+
; CHECK-NEXT: $dj5 = LDA_dms_spill -20, implicit $sp :: (load (s32) from %stack.0 + 20)
124+
; CHECK-NEXT: $dc5 = LDA_dms_spill -16, implicit $sp :: (load (s32) from %stack.0 + 24)
126125
; CHECK-NEXT: ST_dms_spill $m1, -80, implicit $sp :: (store (s32) into %stack.1)
127126
; CHECK-NEXT: ST_dms_spill $dn1, -76, implicit $sp :: (store (s32) into %stack.1 + 4)
128127
; CHECK-NEXT: ST_dms_spill $dj1, -72, implicit $sp :: (store (s32) into %stack.1 + 8)
129128
; CHECK-NEXT: ST_dms_spill $dc1, -68, implicit $sp :: (store (s32) into %stack.1 + 12)
130-
; CHECK-NEXT: ST_dms_spill $m5, -64, implicit $sp :: (store (s32) into %stack.1 + 16)
131-
; CHECK-NEXT: ST_dms_spill $dn5, -60, implicit $sp :: (store (s32) into %stack.1 + 20)
132-
; CHECK-NEXT: ST_dms_spill $dj5, -56, implicit $sp :: (store (s32) into %stack.1 + 24)
133-
; CHECK-NEXT: ST_dms_spill $dc5, -52, implicit $sp :: (store (s32) into %stack.1 + 28)
129+
; CHECK-NEXT: ST_dms_spill $dn5, -64, implicit $sp :: (store (s32) into %stack.1 + 16)
130+
; CHECK-NEXT: ST_dms_spill $dj5, -60, implicit $sp :: (store (s32) into %stack.1 + 20)
131+
; CHECK-NEXT: ST_dms_spill $dc5, -56, implicit $sp :: (store (s32) into %stack.1 + 24)
134132
$d1_3d = LDA_DS_SPILL -40, implicit $sp :: (load (s256) from %stack.0, align 4)
135133
ST_DS_SPILL $d1_3d, -80, implicit $sp :: (store (s256) into %stack.1, align 4)
136134
...
@@ -148,9 +146,9 @@ body: |
148146
bb.0 (align 16):
149147
150148
; CHECK-LABEL: name: test_ds_partial
151-
; CHECK: $dj5 = LDA_dms_spill -16, implicit $sp :: (load (s32) from %stack.0 + 24)
149+
; CHECK: $dj5 = LDA_dms_spill -20, implicit $sp :: (load (s32) from %stack.0 + 20)
152150
; CHECK-NEXT: $dj6 = MOV_mv_scl $dj5
153-
; CHECK-NEXT: ST_dms_spill $dj6, -56, implicit $sp :: (store (s32) into %stack.1 + 24)
151+
; CHECK-NEXT: ST_dms_spill $dj6, -60, implicit $sp :: (store (s32) into %stack.1 + 20)
154152
$d1_3d = LDA_DS_SPILL -40, implicit $sp :: (load (s256) from %stack.0, align 4)
155153
$dj6 = COPY $dj5
156154
ST_DS_SPILL $d2_3d, -80, implicit $sp :: (store (s256) into %stack.1, align 4)
@@ -171,19 +169,17 @@ body: |
171169
; CHECK-NEXT: $dn1 = LDA_dms_spill -36, implicit $sp :: (load (s32) from %stack.0 + 4)
172170
; CHECK-NEXT: $dj1 = LDA_dms_spill -32, implicit $sp :: (load (s32) from %stack.0 + 8)
173171
; CHECK-NEXT: $dc1 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0 + 12)
174-
; CHECK-NEXT: $m5 = LDA_dms_spill -24, implicit $sp :: (load (s32) from %stack.0 + 16)
175-
; CHECK-NEXT: $dn5 = LDA_dms_spill -20, implicit $sp :: (load (s32) from %stack.0 + 20)
176-
; CHECK-NEXT: $dj5 = LDA_dms_spill -16, implicit $sp :: (load (s32) from %stack.0 + 24)
177-
; CHECK-NEXT: $dc5 = LDA_dms_spill -12, implicit $sp :: (load (s32) from %stack.0 + 28)
172+
; CHECK-NEXT: $dn5 = LDA_dms_spill -24, implicit $sp :: (load (s32) from %stack.0 + 16)
173+
; CHECK-NEXT: $dj5 = LDA_dms_spill -20, implicit $sp :: (load (s32) from %stack.0 + 20)
174+
; CHECK-NEXT: $dc5 = LDA_dms_spill -16, implicit $sp :: (load (s32) from %stack.0 + 24)
178175
; CHECK-NEXT: $dj6 = MOV_mv_scl $dj5
179176
; CHECK-NEXT: ST_dms_spill $m2, -80, implicit $sp :: (store (s32) into %stack.1)
180177
; CHECK-NEXT: ST_dms_spill $dn2, -76, implicit $sp :: (store (s32) into %stack.1 + 4)
181178
; CHECK-NEXT: ST_dms_spill $dj2, -72, implicit $sp :: (store (s32) into %stack.1 + 8)
182179
; CHECK-NEXT: ST_dms_spill $dc2, -68, implicit $sp :: (store (s32) into %stack.1 + 12)
183-
; CHECK-NEXT: ST_dms_spill $m6, -64, implicit $sp :: (store (s32) into %stack.1 + 16)
184-
; CHECK-NEXT: ST_dms_spill $dn6, -60, implicit $sp :: (store (s32) into %stack.1 + 20)
185-
; CHECK-NEXT: ST_dms_spill $dj6, -56, implicit $sp :: (store (s32) into %stack.1 + 24)
186-
; CHECK-NEXT: ST_dms_spill $dc6, -52, implicit $sp :: (store (s32) into %stack.1 + 28)
180+
; CHECK-NEXT: ST_dms_spill $dn6, -64, implicit $sp :: (store (s32) into %stack.1 + 16)
181+
; CHECK-NEXT: ST_dms_spill $dj6, -60, implicit $sp :: (store (s32) into %stack.1 + 20)
182+
; CHECK-NEXT: ST_dms_spill $dc6, -56, implicit $sp :: (store (s32) into %stack.1 + 24)
187183
$d1_3d = LDA_DS_SPILL -40, implicit $sp :: (load (s256) from %stack.0, align 4)
188184
$dj6 = COPY $dj5
189185
ST_DS_SPILL $d2_3d, -80, implicit $sp :: (store (s256) into %stack.1, align 4)
@@ -206,19 +202,17 @@ body: |
206202
; CHECK-NEXT: $dn1 = LDA_dms_spill -36, implicit $sp :: (volatile load (s32) from %stack.0 + 4)
207203
; CHECK-NEXT: $dj1 = LDA_dms_spill -32, implicit $sp :: (volatile load (s32) from %stack.0 + 8)
208204
; CHECK-NEXT: $dc1 = LDA_dms_spill -28, implicit $sp :: (volatile load (s32) from %stack.0 + 12)
209-
; CHECK-NEXT: $m5 = LDA_dms_spill -24, implicit $sp :: (volatile load (s32) from %stack.0 + 16)
210-
; CHECK-NEXT: $dn5 = LDA_dms_spill -20, implicit $sp :: (volatile load (s32) from %stack.0 + 20)
211-
; CHECK-NEXT: $dj5 = LDA_dms_spill -16, implicit $sp :: (volatile load (s32) from %stack.0 + 24)
212-
; CHECK-NEXT: $dc5 = LDA_dms_spill -12, implicit $sp :: (volatile load (s32) from %stack.0 + 28)
205+
; CHECK-NEXT: $dn5 = LDA_dms_spill -24, implicit $sp :: (volatile load (s32) from %stack.0 + 16)
206+
; CHECK-NEXT: $dj5 = LDA_dms_spill -20, implicit $sp :: (volatile load (s32) from %stack.0 + 20)
207+
; CHECK-NEXT: $dc5 = LDA_dms_spill -16, implicit $sp :: (volatile load (s32) from %stack.0 + 24)
213208
; CHECK-NEXT: $dj6 = MOV_mv_scl $dj5
214209
; CHECK-NEXT: ST_dms_spill undef $m2, -80, implicit $sp :: (volatile store (s32) into %stack.1)
215210
; CHECK-NEXT: ST_dms_spill undef $dn2, -76, implicit $sp :: (volatile store (s32) into %stack.1 + 4)
216211
; CHECK-NEXT: ST_dms_spill undef $dj2, -72, implicit $sp :: (volatile store (s32) into %stack.1 + 8)
217212
; CHECK-NEXT: ST_dms_spill undef $dc2, -68, implicit $sp :: (volatile store (s32) into %stack.1 + 12)
218-
; CHECK-NEXT: ST_dms_spill undef $m6, -64, implicit $sp :: (volatile store (s32) into %stack.1 + 16)
219-
; CHECK-NEXT: ST_dms_spill undef $dn6, -60, implicit $sp :: (volatile store (s32) into %stack.1 + 20)
220-
; CHECK-NEXT: ST_dms_spill $dj6, -56, implicit $sp :: (volatile store (s32) into %stack.1 + 24)
221-
; CHECK-NEXT: ST_dms_spill undef $dc6, -52, implicit $sp :: (volatile store (s32) into %stack.1 + 28)
213+
; CHECK-NEXT: ST_dms_spill undef $dn6, -64, implicit $sp :: (volatile store (s32) into %stack.1 + 16)
214+
; CHECK-NEXT: ST_dms_spill $dj6, -60, implicit $sp :: (volatile store (s32) into %stack.1 + 20)
215+
; CHECK-NEXT: ST_dms_spill undef $dc6, -56, implicit $sp :: (volatile store (s32) into %stack.1 + 24)
222216
$d1_3d = LDA_DS_SPILL -40, implicit $sp :: (volatile load (s256) from %stack.0, align 4)
223217
$dj6 = COPY $dj5
224218
ST_DS_SPILL $d2_3d, -80, implicit $sp :: (volatile store (s256) into %stack.1, align 4)

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