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[AIE2][AIE2P] Emit COPY in spilling through GPRs
When we have to spill a register that does not support spilling directly, we need to bounce through another register that does support spilling. Instead of using the target-specific move instruction to move the value into the register that does support spilling, we emit a COPY instruction to move the value. This enables optimizations on the COPY instruction, such as removing it if it is redundant (see tests).
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6 files changed

+20
-22
lines changed

6 files changed

+20
-22
lines changed

‎llvm/lib/Target/AIE/AIE2InstrInfo.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -708,7 +708,7 @@ void AIE2InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
708708
// Can't spill these directly. Need to bounce through a GPR.
709709
MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
710710
Register ScratchReg = MRI.createVirtualRegister(&AIE2::eRRegClass);
711-
BuildMI(MBB, I, DL, get(AIE2::MOV_mv_scl), ScratchReg)
711+
BuildMI(MBB, I, DL, get(TargetOpcode::COPY), ScratchReg)
712712
.addReg(SrcReg, getKillRegState(IsKill));
713713
Opcode = AIE2::ST_dms_spill;
714714
SrcReg = ScratchReg;
@@ -786,7 +786,7 @@ void AIE2InstrInfo::loadRegFromStackSlot(
786786
BuildMI(MBB, I, DL, get(AIE2::LDA_dms_spill), Reg)
787787
.addFrameIndex(FI)
788788
.addMemOperand(CreateMMO(FI));
789-
BuildMI(MBB, I, DL, get(AIE2::MOV_mv_scl), DstReg)
789+
BuildMI(MBB, I, DL, get(TargetOpcode::COPY), DstReg)
790790
.addReg(Reg, getKillRegState(true));
791791
return;
792792
} else {

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -980,7 +980,7 @@ void AIE2PInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
980980
// Can't spill these directly. Need to bounce through a GPR.
981981
MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
982982
Register ScratchReg = MRI.createVirtualRegister(&AIE2P::eRRegClass);
983-
BuildMI(MBB, I, DL, get(AIE2P::MOV_alu_mv_mv_mv_scl), ScratchReg)
983+
BuildMI(MBB, I, DL, get(TargetOpcode::COPY), ScratchReg)
984984
.addReg(SrcReg, getKillRegState(IsKill));
985985
Opcode = AIE2P::ST_R_SPILL;
986986
SrcReg = ScratchReg;
@@ -1065,7 +1065,7 @@ void AIE2PInstrInfo::loadRegFromStackSlot(
10651065
BuildMI(MBB, I, DL, get(AIE2P::LDA_R_SPILL), Reg)
10661066
.addFrameIndex(FI)
10671067
.addMemOperand(CreateMMO(FI));
1068-
BuildMI(MBB, I, DL, get(AIE2P::MOV_alu_mv_mv_mv_scl), DstReg)
1068+
BuildMI(MBB, I, DL, get(TargetOpcode::COPY), DstReg)
10691069
.addReg(Reg, getKillRegState(true));
10701070
return;
10711071
} else if (regClassMatches(AIE2P::spill_vec512_to_compositeRegClass, RC,

‎llvm/test/CodeGen/AIE/aie2/spill/spill-sreg-high-gpr-pressure.mir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
# See https://llvm.org/LICENSE.txt for license information.
55
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
66
#
7-
# (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
7+
# (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates
88
# RUN: llc -mtriple=aie2 --verify-machineinstrs --aie-reserved-gprs=31 -run-pass=greedy -run-pass=virtregrewriter %s -o - | FileCheck %s
99

1010
# We particularly focus on the spill_es_to_er when there is a high GPR and
@@ -27,7 +27,7 @@ body: |
2727
; CHECK-NEXT: ST_dms_spill $r1, %stack.0, implicit $sp :: (store (s32) into %stack.0)
2828
; CHECK-NEXT: ST_dms_sts_idx_imm $r0, $p0, 0, implicit $s0
2929
; CHECK-NEXT: renamable $r0 = LDA_dms_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
30-
; CHECK-NEXT: renamable $s0 = MOV_mv_scl killed renamable $r0
30+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
3131
; CHECK-NEXT: renamable $cm0 = VUPS_S32_D16_mv_ups_x2c $x0, killed renamable $s0, implicit-def $srups_of, implicit $crsat, implicit $crupssign
3232
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $cm0, implicit $s1, implicit $s2, implicit $s3
3333
%0:spill_es_to_er = COPY $r1
@@ -51,11 +51,11 @@ body: |
5151
; CHECK-LABEL: name: spill_es_to_er_class
5252
; CHECK: liveins: $s0
5353
; CHECK-NEXT: {{ $}}
54-
; CHECK-NEXT: renamable $r0 = MOV_mv_scl $s0
54+
; CHECK-NEXT: renamable $r0 = COPY $s0
5555
; CHECK-NEXT: ST_dms_spill killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
5656
; CHECK-NEXT: PseudoJL 32, csr_aie2, implicit-def $lr
5757
; CHECK-NEXT: renamable $r0 = LDA_dms_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
58-
; CHECK-NEXT: renamable $s0 = MOV_mv_scl killed renamable $r0
58+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
5959
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0
6060
%0:spill_es_to_er = COPY $s0
6161
PseudoJL 32, csr_aie2, implicit-def $lr

‎llvm/test/CodeGen/AIE/aie2/spill/spill-sreg.mir‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
# See https://llvm.org/LICENSE.txt for license information.
55
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
66
#
7-
# (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
7+
# (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates
88
# RUN: llc -mtriple=aie2 --verify-machineinstrs -run-pass=greedy -run-pass=virtregrewriter %s -o - | FileCheck %s
99

1010
# There are 5 mSs (SHIFT) registers in use, one by %20, and 4 by the PseudoRET.
@@ -23,7 +23,6 @@ body: |
2323
; CHECK: liveins: $s0, $x0
2424
; CHECK-NEXT: {{ $}}
2525
; CHECK-NEXT: renamable $r0 = MOVA_lda_cg 32
26-
; CHECK-NEXT: renamable $r0 = MOV_mv_scl killed renamable $r0
2726
; CHECK-NEXT: ST_dms_spill killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
2827
; CHECK-NEXT: renamable $r0 = MOVA_lda_cg 32
2928
; CHECK-NEXT: renamable $s2 = COPY killed renamable $r0
@@ -33,7 +32,7 @@ body: |
3332
; CHECK-NEXT: renamable $s1 = COPY killed renamable $r0
3433
; CHECK-NEXT: renamable $cm0 = VUPS_S32_D16_mv_ups_x2c $x0, $s0, implicit-def $srups_of, implicit $crsat, implicit $crupssign
3534
; CHECK-NEXT: renamable $r0 = LDA_dms_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
36-
; CHECK-NEXT: renamable $s0 = MOV_mv_scl killed renamable $r0
35+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
3736
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0, implicit killed renamable $s2, implicit killed renamable $s3, implicit killed renamable $s1, implicit killed renamable $cm0
3837
%10:er = MOVA_lda_cg 32
3938
%0:mss = COPY %10
@@ -108,11 +107,11 @@ body: |
108107
; CHECK-LABEL: name: spill_to_mem_caller_saved
109108
; CHECK: liveins: $s0
110109
; CHECK-NEXT: {{ $}}
111-
; CHECK-NEXT: renamable $r0 = MOV_mv_scl $s0
110+
; CHECK-NEXT: renamable $r0 = COPY $s0
112111
; CHECK-NEXT: ST_dms_spill killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
113112
; CHECK-NEXT: PseudoJL 32, csr_aie2, implicit-def $lr
114113
; CHECK-NEXT: renamable $r0 = LDA_dms_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
115-
; CHECK-NEXT: renamable $s0 = MOV_mv_scl killed renamable $r0
114+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
116115
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0
117116
%0:es = COPY $s0
118117
PseudoJL 32, csr_aie2, implicit-def $lr

‎llvm/test/CodeGen/AIE/aie2p/spill/spill-sreg-high-gpr-pressure.mir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
# See https://llvm.org/LICENSE.txt for license information.
55
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
66
#
7-
# (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
7+
# (c) Copyright 2024-2025 Advanced Micro Devices, Inc. or its affiliates
88
# RUN: llc -mtriple=aie2p --verify-machineinstrs --aie-reserved-gprs=31 -run-pass=greedy -run-pass=virtregrewriter %s -o - | FileCheck %s
99

1010
# We particularly focus on the spill_es_to_er when there is a high GPR and
@@ -27,7 +27,7 @@ body: |
2727
; CHECK-NEXT: ST_R_SPILL $r1, %stack.0, implicit $sp :: (store (s32) into %stack.0)
2828
; CHECK-NEXT: ST_dms_sts_idx_imm $r0, $p0, 0, implicit $s0
2929
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
30-
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
30+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
3131
; CHECK-NEXT: renamable $cml0 = VUPS_2x_mv_ups_x2c_upsSign0 $x0, killed renamable $s0, implicit-def $srups_of, implicit $crsat, implicit $crupsmode, implicit $upssign0
3232
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $cml0, implicit $s1, implicit $s2, implicit $s3
3333
%0:spill_es_to_er = COPY $r1
@@ -51,11 +51,11 @@ body: |
5151
; CHECK-LABEL: name: spill_es_to_er_class
5252
; CHECK: liveins: $s0
5353
; CHECK-NEXT: {{ $}}
54-
; CHECK-NEXT: renamable $r0 = MOV_alu_mv_mv_mv_scl $s0
54+
; CHECK-NEXT: renamable $r0 = COPY $s0
5555
; CHECK-NEXT: ST_R_SPILL killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
5656
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
5757
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
58-
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
58+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
5959
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0
6060
%0:spill_es_to_er = COPY $s0
6161
PseudoJL 32, csr_aie2p, implicit-def $lr

‎llvm/test/CodeGen/AIE/aie2p/spill/spill-sreg.mir‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
# See https://llvm.org/LICENSE.txt for license information.
55
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
66
#
7-
# (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
7+
# (c) Copyright 2024-2025 Advanced Micro Devices, Inc. or its affiliates
88
# RUN: llc -mtriple=aie2p --verify-machineinstrs -run-pass=greedy -run-pass=virtregrewriter %s -o - | FileCheck %s
99

1010
# There are 5 mSs (SHIFT) registers in use, one by %20, and 4 by the PseudoRET.
@@ -23,7 +23,6 @@ body: |
2323
; CHECK: liveins: $s0, $x0
2424
; CHECK-NEXT: {{ $}}
2525
; CHECK-NEXT: renamable $r0 = MOVA 32
26-
; CHECK-NEXT: renamable $r0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
2726
; CHECK-NEXT: ST_R_SPILL killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
2827
; CHECK-NEXT: renamable $r0 = MOVA 32
2928
; CHECK-NEXT: renamable $s2 = COPY killed renamable $r0
@@ -33,7 +32,7 @@ body: |
3332
; CHECK-NEXT: renamable $s1 = COPY killed renamable $r0
3433
; CHECK-NEXT: renamable $cml0 = VUPS_2x_mv_ups_x2c_upsSign0 $x0, $s0, implicit-def $srups_of, implicit $crsat, implicit $crupsmode, implicit $upssign0
3534
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
36-
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
35+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
3736
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0, implicit killed renamable $s2, implicit killed renamable $s3, implicit killed renamable $s1, implicit killed renamable $cml0
3837
%10:er = MOVA 32
3938
%0:mss = COPY %10
@@ -108,11 +107,11 @@ body: |
108107
; CHECK-LABEL: name: spill_to_mem_caller_saved
109108
; CHECK: liveins: $s0
110109
; CHECK-NEXT: {{ $}}
111-
; CHECK-NEXT: renamable $r0 = MOV_alu_mv_mv_mv_scl $s0
110+
; CHECK-NEXT: renamable $r0 = COPY $s0
112111
; CHECK-NEXT: ST_R_SPILL killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
113112
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
114113
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
115-
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
114+
; CHECK-NEXT: renamable $s0 = COPY killed renamable $r0
116115
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0
117116
%0:es = COPY $s0
118117
PseudoJL 32, csr_aie2p, implicit-def $lr

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