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[WIP] Spill to register instead of stack
1 parent 94e6788 commit ac87c2e

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3 files changed

+45
-0
lines changed

3 files changed

+45
-0
lines changed

llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -913,6 +913,18 @@ void AIE2PInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
913913
Opcode = AIE2P::VST_E_SPILL;
914914
} else if (regClassMatches(AIE2P::VEC576RegClass, RC, SrcReg)) {
915915
Opcode = AIE2P::VST_EX_SPILL;
916+
} else if (regClassMatches(AIE2P::spill_acc1024_to_compositeRegClass, RC,
917+
SrcReg)) {
918+
Opcode = AIE2P::VST_CM_SPILL;
919+
} else if (regClassMatches(AIE2P::spill_acc512_to_compositeRegClass, RC,
920+
SrcReg)) {
921+
Opcode = AIE2P::VST_dmx_sts_bm_spill;
922+
} else if (regClassMatches(AIE2P::spill_vec1024_to_compositeRegClass, RC,
923+
SrcReg)) {
924+
Opcode = AIE2P::VST_Y_SPILL;
925+
} else if (regClassMatches(AIE2P::spill_vec512_to_compositeRegClass, RC,
926+
SrcReg)) {
927+
Opcode = AIE2P::VST_dmx_sts_x_spill;
916928
} else if (regClassMatches(AIE2P::eSRegClass, RC, SrcReg) ||
917929
regClassMatches(AIE2P::spill_eS_to_eRRegClass, RC, SrcReg)) {
918930
// Can't spill these directly. Need to bounce through a GPR.
@@ -982,6 +994,7 @@ void AIE2PInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
982994
} else if (regClassMatches(AIE2P::ACC2048RegClass, RC, DstReg)) {
983995
Opcode = AIE2P::VLDA_DM_SPILL;
984996
} else if (regClassMatches(AIE2P::ACC1024RegClass, RC, DstReg)) {
997+
I->dump();
985998
Opcode = AIE2P::VLDA_CM_SPILL;
986999
} else if (regClassMatches(AIE2P::FIFO1024RegClass, RC, DstReg)) {
9871000
Opcode = AIE2P::VLDA_FIFO_SPILL;
@@ -999,6 +1012,18 @@ void AIE2PInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
9991012
Opcode = AIE2P::VLDA_E_SPILL;
10001013
} else if (regClassMatches(AIE2P::VEC576RegClass, RC, DstReg)) {
10011014
Opcode = AIE2P::VLDA_EX_SPILL;
1015+
} else if (regClassMatches(AIE2P::spill_acc1024_to_compositeRegClass, RC,
1016+
DstReg)) {
1017+
Opcode = AIE2P::VLDA_CM_SPILL;
1018+
} else if (regClassMatches(AIE2P::spill_acc512_to_compositeRegClass, RC,
1019+
DstReg)) {
1020+
Opcode = AIE2P::VLDA_dmx_lda_bm_spill;
1021+
} else if (regClassMatches(AIE2P::spill_vec1024_to_compositeRegClass, RC,
1022+
DstReg)) {
1023+
Opcode = AIE2P::VLDA_Y_SPILL;
1024+
} else if (regClassMatches(AIE2P::spill_vec512_to_compositeRegClass, RC,
1025+
DstReg)) {
1026+
Opcode = AIE2P::VLDA_dmx_lda_x_spill;
10021027
} else if (regClassMatches(AIE2P::eSRegClass, RC, DstReg) ||
10031028
regClassMatches(AIE2P::spill_eS_to_eRRegClass, RC, DstReg)) {
10041029
// Can't spill these directly. Need to bounce through a GPR.
@@ -1011,6 +1036,7 @@ void AIE2PInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
10111036
.addReg(Reg, getKillRegState(true));
10121037
return;
10131038
} else {
1039+
I->dump();
10141040
llvm_unreachable(
10151041
"Can't load this register from stack slot: is it virtual?");
10161042
}

llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,12 @@ cl::opt<bool> EnableCoalescingForWideCopy(
4343

4444
extern llvm::cl::opt<unsigned> ReservedGPRs;
4545

46+
static llvm::cl::opt<bool>
47+
SpillAccToVecOrAcc("aie2p-spill-accumulator-to-vec-or-acc", cl::Hidden,
48+
cl::init(true),
49+
cl::desc("Allow spilling accumulator registers to "
50+
"vector or accumulator registers"));
51+
4652
AIE2PRegisterInfo::AIE2PRegisterInfo(unsigned HwMode)
4753
: AIE2PGenRegisterInfo(AIE2P::sp, /*DwarfFlavour*/ 0, /*EHFlavor*/ 0,
4854
/*PC*/ 0, HwMode) {}
@@ -482,6 +488,14 @@ AIE2PRegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,
482488

483489
if (AIE2P::eSRegClass.hasSubClassEq(RC))
484490
return &AIE2P::spill_eS_to_eRRegClass;
491+
if (SpillAccToVecOrAcc && RC == &AIE2P::ACC1024RegClass)
492+
return &AIE2P::spill_acc1024_to_compositeRegClass;
493+
if (SpillAccToVecOrAcc && RC == &AIE2P::ACC512RegClass)
494+
return &AIE2P::spill_acc512_to_compositeRegClass;
495+
if (SpillAccToVecOrAcc && RC == &AIE2P::VEC1024RegClass)
496+
return &AIE2P::spill_vec1024_to_compositeRegClass;
497+
if (SpillAccToVecOrAcc && RC == &AIE2P::VEC512RegClass)
498+
return &AIE2P::spill_vec512_to_compositeRegClass;
485499
return RC;
486500
}
487501

llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.td

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1003,4 +1003,9 @@ def spill_eDN_to_eR : AIE2PScalarRegisterClass<(add eDN, eR)>;
10031003
def spill_eDJ_to_eR : AIE2PScalarRegisterClass<(add eDJ, eR, eDN)>;
10041004
def spill_eDC_to_eR : AIE2PScalarRegisterClass<(add eDC, eR)>;
10051005

1006+
def spill_vec512_to_composite : AIE2PVector512RegisterClass<(add mXm, mBMm)>;
1007+
def spill_vec1024_to_composite : AIE2PVector1024RegisterClass<(add eY, mCMm)>;
1008+
def spill_acc512_to_composite : AIE2PVector512RegisterClass<(add mBMm, mXm)>;
1009+
def spill_acc1024_to_composite : AIE2PVector1024RegisterClass<(add mCMm, eY)>;
1010+
10061011
} // End AIE2P Namespace

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