[AIEX][NFC] all intrinsics have DefaultAttrsIntrinsic

Author: F-Stuckmann

clang/test/CodeGen/aie/aie-srs-intrinsics.cpp

@@ -5,7 +5,7 @@
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
-// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
+// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates
 //
 //===----------------------------------------------------------------------===//
 // RUN: %clang -O2 %s --target=aie2 -nostdlibinc -S -emit-llvm -o - | FileCheck %s
@@ -26,7 +26,7 @@ v16int32 test_srs_to_int32(v16acc64 acc, int shft, int sign) {
 // CHECK-NEXT:    [[TMP1:%.*]] = tail call noundef i32 @llvm.aie2.get.ctrl.reg(i32 6)
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 9, i32 [[SAT:%.*]])
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 6, i32 [[RND:%.*]])
-// CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i32> @llvm.aie2.I512.v16.acc64.srs(<16 x i64> [[ACC:%.*]], i32 [[SHFT:%.*]], i32 [[SIGN:%.*]])
+// CHECK-NEXT:    [[TMP2:%.*]] = tail call noundef <16 x i32> @llvm.aie2.I512.v16.acc64.srs(<16 x i64> [[ACC:%.*]], i32 [[SHFT:%.*]], i32 [[SIGN:%.*]])
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 9, i32 [[TMP0]])
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 6, i32 [[TMP1]])
 // CHECK-NEXT:    ret <16 x i32> [[TMP2]]
@@ -50,7 +50,7 @@ v16uint32 test_srs_to_uint32(v16acc64 acc, int shft, int sign) {
 // CHECK-NEXT:    [[TMP1:%.*]] = tail call noundef i32 @llvm.aie2.get.ctrl.reg(i32 6)
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 9, i32 [[SAT:%.*]])
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 6, i32 [[RND:%.*]])
-// CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i32> @llvm.aie2.I512.v16.acc64.srs(<16 x i64> [[ACC:%.*]], i32 [[SHFT:%.*]], i32 [[SIGN:%.*]])
+// CHECK-NEXT:    [[TMP2:%.*]] = tail call noundef <16 x i32> @llvm.aie2.I512.v16.acc64.srs(<16 x i64> [[ACC:%.*]], i32 [[SHFT:%.*]], i32 [[SIGN:%.*]])
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 9, i32 [[TMP0]])
 // CHECK-NEXT:    tail call void @llvm.aie2.set.ctrl.reg(i32 6, i32 [[TMP1]])
 // CHECK-NEXT:    ret <16 x i32> [[TMP2]]

clang/test/CodeGen/aie/aie2/aie2-upd-ext-intrinsic.cpp

@@ -35,7 +35,7 @@ void test_intrinsic_annotated_pointer(v64bfp16ebs8_unaligned __aie_dm_resource_a
 }
 
 // CHECK-LABEL: define dso_local noundef <64 x i8> @_Z43test_intrinsic_annotated_pointer_fillx_popxPU3AS522v64bfp16ebs8_unalignedPU3AS6Dv64_DB8_R12fifo_state_t(
-// CHECK-SAME: ptr addrspace(5) [[P_UNALIGNED:%.*]], ptr addrspace(6) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-SAME: ptr addrspace(5) [[P_UNALIGNED:%.*]], ptr addrspace(6) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR0]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[POS1_I_I:%.*]] = getelementptr inbounds nuw i8, ptr [[S]], i20 128
 // CHECK-NEXT:    [[EXTRA3_I_I:%.*]] = getelementptr inbounds nuw i8, ptr [[S]], i20 192
@@ -65,7 +65,7 @@ v128uint4 test_intrinsic_annotated_pointer_fillx_popx(v64bfp16ebs8_unaligned __a
 }
 
 // CHECK-LABEL: define dso_local noundef <64 x i8> @_Z41test_intrinsic_annotated_pointer_fill_popPU3AS522v64bfp16ebs8_unalignedPU3AS6Dv64_DB8_R12fifo_state_t(
-// CHECK-SAME: ptr addrspace(5) [[P_UNALIGNED:%.*]], ptr addrspace(6) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-SAME: ptr addrspace(5) [[P_UNALIGNED:%.*]], ptr addrspace(6) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR0]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[POS1_I:%.*]] = getelementptr inbounds nuw i8, ptr [[S]], i20 128
 // CHECK-NEXT:    [[TMP0:%.*]] = load <32 x i32>, ptr [[S]], align 64, !tbaa [[TBAA2]]
@@ -89,7 +89,7 @@ v128uint4 test_intrinsic_annotated_pointer_fill_pop(v64bfp16ebs8_unaligned __aie
 }
 
 // CHECK-LABEL: define dso_local void @_Z42test_intrinsic_annotated_pointer_referenceRPU3AS522v64bfp16ebs8_unaligned12v64bfp16ebs8R12fifo_state_t(
-// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], [[STRUCT_V64BFP16EBS8:%.*]] [[V_COERCE:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
+// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], [[STRUCT_V64BFP16EBS8:%.*]] [[V_COERCE:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_V64BFP16EBS8]] [[V_COERCE]], 0
 // CHECK-NEXT:    [[TMP1:%.*]] = extractvalue [[STRUCT_V64BFP16EBS8]] [[V_COERCE]], 1
@@ -114,7 +114,7 @@ void test_intrinsic_annotated_pointer_reference(v64bfp16ebs8_unaligned __aie_dm_
 
 
 // CHECK-LABEL: define dso_local noundef <64 x i8> @_Z53test_intrinsic_annotated_pointer_reference_fillx_popxRPU3AS522v64bfp16ebs8_unalignedRPU3AS6Dv64_DB8_R12fifo_state_t(
-// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P_UNALIGNED:%.*]], ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR3:[0-9]+]] {
+// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P_UNALIGNED:%.*]], ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[POS1_I_I:%.*]] = getelementptr inbounds nuw i8, ptr [[S]], i20 128
 // CHECK-NEXT:    [[EXTRA3_I_I:%.*]] = getelementptr inbounds nuw i8, ptr [[S]], i20 192
@@ -153,7 +153,7 @@ v128uint4 test_intrinsic_annotated_pointer_reference_fillx_popx(v64bfp16ebs8_una
 }
 
 // CHECK-LABEL: define dso_local noundef <64 x i8> @_Z51test_intrinsic_annotated_pointer_reference_fill_popRPU3AS522v64bfp16ebs8_unalignedRPU3AS6Dv64_DB8_R12fifo_state_t(
-// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P_UNALIGNED:%.*]], ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR3]] {
+// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P_UNALIGNED:%.*]], ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], ptr nocapture nonnull align 64 dereferenceable(256) [[S:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[POS1_I:%.*]] = getelementptr inbounds nuw i8, ptr [[S]], i20 128
 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr addrspace(5), ptr [[P_UNALIGNED]], align 4, !tbaa [[TBAA7]]
@@ -185,7 +185,7 @@ v128uint4 test_intrinsic_annotated_pointer_reference_fill_pop(v64bfp16ebs8_unali
 }
 
 // CHECK-LABEL: define dso_local void @_Z47test_intrinsic_annotated_pointer_reference_loopRPU3AS522v64bfp16ebs8_unaligned12v64bfp16ebs8i(
-// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], [[STRUCT_V64BFP16EBS8:%.*]] [[V_COERCE:%.*]], i32 noundef [[NUM:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], [[STRUCT_V64BFP16EBS8:%.*]] [[V_COERCE:%.*]], i32 noundef [[NUM:%.*]]) local_unnamed_addr #[[ATTR3:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[NUM]], 0
 // CHECK-NEXT:    br i1 [[CMP6]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]]
@@ -212,7 +212,7 @@ v128uint4 test_intrinsic_annotated_pointer_reference_fill_pop(v64bfp16ebs8_unali
 // CHECK-NEXT:    store ptr addrspace(5) [[TMP8]], ptr [[P]], align 4
 // CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[I_09]], 1
 // CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC]], [[NUM]]
-// CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+// CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
 //
 void test_intrinsic_annotated_pointer_reference_loop(
     v64bfp16ebs8_unaligned __aie_dm_resource_a *&p, v64bfp16ebs8 v, int num) {
@@ -225,7 +225,7 @@ void test_intrinsic_annotated_pointer_reference_loop(
 }
 
 // CHECK-LABEL: define dso_local void @_Z45test_intrinsic_default_pointer_reference_loopRP22v64bfp16ebs8_unaligned12v64bfp16ebs8i(
-// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], [[STRUCT_V64BFP16EBS8:%.*]] [[V_COERCE:%.*]], i32 noundef [[NUM:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-SAME: ptr nocapture nonnull align 4 dereferenceable(4) [[P:%.*]], [[STRUCT_V64BFP16EBS8:%.*]] [[V_COERCE:%.*]], i32 noundef [[NUM:%.*]]) local_unnamed_addr #[[ATTR3]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[NUM]], 0
 // CHECK-NEXT:    br i1 [[CMP6]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]]
@@ -252,7 +252,7 @@ void test_intrinsic_annotated_pointer_reference_loop(
 // CHECK-NEXT:    store ptr [[TMP8]], ptr [[P]], align 4
 // CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[I_09]], 1
 // CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC]], [[NUM]]
-// CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+// CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
 //
 void test_intrinsic_default_pointer_reference_loop(
     v64bfp16ebs8_unaligned *&p, v64bfp16ebs8 v, int num) {
@@ -272,8 +272,8 @@ void test_intrinsic_default_pointer_reference_loop(
 // CHECK: [[TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
 // CHECK: [[META8]] = !{!"p1 void", [[META9:![0-9]+]], i64 0}
 // CHECK: [[META9]] = !{!"any pointer", [[META3]], i64 0}
-// CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META10:![0-9]+]], [[META11:![0-9]+]]}
-// CHECK: [[META10]] = !{!"llvm.loop.mustprogress"}
-// CHECK: [[META11]] = !{!"llvm.loop.unroll.disable"}
-// CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META10]], [[META11]]}
+// CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META11:![0-9]+]], [[META12:![0-9]+]]}
+// CHECK: [[META11]] = !{!"llvm.loop.mustprogress"}
+// CHECK: [[META12]] = !{!"llvm.loop.unroll.disable"}
+// CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META11]], [[META12]]}
 //.