@@ -1106,18 +1106,18 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
11061106 if (!isTypeLegal(VT))
11071107 continue;
11081108 setOperationAction({ISD::FP_ROUND, ISD::FP_EXTEND}, VT, Custom);
1109- setOperationAction({ISD::VP_FP_ROUND, ISD::VP_FP_EXTEND}, VT, Custom);
11101109 setOperationAction({ISD::STRICT_FP_ROUND, ISD::STRICT_FP_EXTEND}, VT,
11111110 Custom);
1111+ setOperationAction({ISD::VP_FP_ROUND, ISD::VP_FP_EXTEND}, VT, Custom);
1112+ setOperationAction({ISD::VP_MERGE, ISD::VP_SELECT, ISD::SELECT}, VT,
1113+ Custom);
1114+ setOperationAction(ISD::SELECT_CC, VT, Expand);
11121115 setOperationAction({ISD::CONCAT_VECTORS, ISD::INSERT_SUBVECTOR,
11131116 ISD::EXTRACT_SUBVECTOR},
11141117 VT, Custom);
1115- setOperationAction({ISD::LOAD, ISD::STORE}, VT, Custom);
11161118 if (Subtarget.hasStdExtZfbfmin())
11171119 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom);
1118- setOperationAction({ISD::VP_MERGE, ISD::VP_SELECT, ISD::SELECT}, VT,
1119- Custom);
1120- setOperationAction(ISD::SELECT_CC, VT, Expand);
1120+ setOperationAction({ISD::LOAD, ISD::STORE}, VT, Custom);
11211121 // TODO: Promote to fp32.
11221122 }
11231123 }
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