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README.md

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[![GitHub license](https://img.shields.io/badge/license-apache2-yellowgreen)](./LICENSE)
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[![GitHub issues](https://img.shields.io/github/issues/Xtra-Computing/On-the-fly-data-shuffling-for-OpenCL-based-FPGAs.svg)](https://github.com/Xtra-Computing/On-the-fly-data-shuffling-for-OpenCL-based-FPGAs/issues)
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# ThunderGP: Fast Graph Processing for HLS-based FPGAs
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# ThunderGP: HLS-based Graph Processing Framework on FPGAs
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## What's new?
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Two aspacts make the ThunderGP deliver superior performance.
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On the one hand, ThunderGP embraces an improved execution flow to better exploit the pipeline parallelism of FPGA and alleviate the data access amount to the global memory. On the other hand, the memory accesses are highly optimized to fully utilize the memory bandwidth capacity of the hardware platforms.
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ThunderGP can run on both Xilinx and Intel platforms:
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* [Check the implementation on Intel platform out.](https://github.com/Xtra-Computing/On-the-fly-data-shuffling-for-OpenCL-based-FPGAs/)
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* On Xilinx multi-SLR based FPGAs, it is running at 250Mhz, and the performance can be up to ***6400 MTEPS (million traversed edges per second)***, or a ***2.9 times speedup*** over the state-of-the-art.
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On Xilinx multi-SLR based FPGAs, it is running at 250Mhz, and the performance can be up to ***6400 MTEPS (million traversed edges per second)***, or a ***2.9 times speedup*** over the state-of-the-art.
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## Prerequisites
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$ cd ./
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$ make app=pr clean
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$ make app=pr all # make the host execution program and FPGA execution program for pagerank application. It takes time.
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$ ./host [bitfile] [graph name] #e.g., ./host_graph_fpga _x/link/int/graph_fpga.hw.xilinx_vcu1525_xdma_201830_1.xclbin wiki-talk
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$ ./host_graph_fpga_pr ./xclbin_pr/graph_fpga.hw.xilinx_vcu1525_xdma_201830_1.xclbin wiki-talk
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```
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#### More details: [Compiling ThunderGP ](docs/compile_arch.md)
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