kernel: remove $barrier from cellaigs and satgen

* this was added earlier in the PR with the intention of making
  equiv_opt work, but it means barriers are lost through passes like
  aigmap and can potentially be used in optimization passes so it is better to
  remove it

Author: georgerennie

kernel/cellaigs.cc

@@ -291,7 +291,7 @@ Aig::Aig(Cell *cell)
 		}
 	}
 
-	if (cell->type.in(ID($not), ID($_NOT_), ID($pos), ID($buf), ID($barrier), ID($_BUF_)))
+	if (cell->type.in(ID($not), ID($_NOT_), ID($pos), ID($buf), ID($_BUF_)))
 	{
 		for (int i = 0; i < GetSize(cell->getPort(ID::Y)); i++) {
 			int A = mk.inport(ID::A, i);

kernel/satgen.cc

@@ -430,15 +430,15 @@ bool SatGen::importCell(RTLIL::Cell *cell, int timestep)
 		return true;
 	}
 
-	if (cell->type.in(ID($pos), ID($buf), ID($barrier), ID($neg)))
+	if (cell->type.in(ID($pos), ID($buf), ID($neg)))
 	{
 		std::vector<int> a = importDefSigSpec(cell->getPort(ID::A), timestep);
 		std::vector<int> y = importDefSigSpec(cell->getPort(ID::Y), timestep);
 		extendSignalWidthUnary(a, y, cell);
 
 		std::vector<int> yy = model_undef ? ez->vec_var(y.size()) : y;
 
-		if (cell->type.in(ID($pos), ID($buf), ID($barrier))) {
+		if (cell->type.in(ID($pos), ID($buf))) {
 			ez->assume(ez->vec_eq(a, yy));
 		} else {
 			std::vector<int> zero(a.size(), ez->CONST_FALSE);
@@ -451,7 +451,7 @@ bool SatGen::importCell(RTLIL::Cell *cell, int timestep)
 			std::vector<int> undef_y = importUndefSigSpec(cell->getPort(ID::Y), timestep);
 			extendSignalWidthUnary(undef_a, undef_y, cell);
 
-			if (cell->type.in(ID($pos), ID($buf), ID($barrier))) {
+			if (cell->type.in(ID($pos), ID($buf))) {
 				ez->assume(ez->vec_eq(undef_a, undef_y));
 			} else {
 				int undef_any_a = ez->expression(ezSAT::OpOr, undef_a);