@@ -107,22 +107,25 @@ static std::pair<std::optional<ClockGateCell>, std::optional<ClockGateCell>>
107107 continue ;
108108
109109 if (auto clk = pin->find (" clock_gate_clock_pin" )) {
110- if (!icg_interface.clk_in_pin .empty ())
111- log_error (" Malformed liberty file - multiple clock_gate_clock_pin in cell %s\n " ,
110+ if (!icg_interface.clk_in_pin .empty ()) {
111+ log_warning (" Malformed liberty file - multiple clock_gate_clock_pin in cell %s\n " ,
112112 cell_name.c_str ());
113- else
113+ continue ;
114+ } else
114115 icg_interface.clk_in_pin = RTLIL::escape_id (pin->args [0 ]);
115116 } else if (auto gclk = pin->find (" clock_gate_out_pin" )) {
116- if (!icg_interface.clk_out_pin .empty ())
117- log_error (" Malformed liberty file - multiple clock_gate_out_pin in cell %s\n " ,
117+ if (!icg_interface.clk_out_pin .empty ()) {
118+ log_warning (" Malformed liberty file - multiple clock_gate_out_pin in cell %s\n " ,
118119 cell_name.c_str ());
119- else
120+ continue ;
121+ } else
120122 icg_interface.clk_out_pin = RTLIL::escape_id (pin->args [0 ]);
121123 } else if (auto en = pin->find (" clock_gate_enable_pin" )) {
122- if (!icg_interface.ce_pin .empty ())
123- log_error (" Malformed liberty file - multiple clock_gate_enable_pin in cell %s\n " ,
124+ if (!icg_interface.ce_pin .empty ()) {
125+ log_warning (" Malformed liberty file - multiple clock_gate_enable_pin in cell %s\n " ,
124126 cell_name.c_str ());
125- else
127+ continue ;
128+ } else
126129 icg_interface.ce_pin = RTLIL::escape_id (pin->args [0 ]);
127130 } else if (auto se = pin->find (" clock_gate_test_pin" )) {
128131 icg_interface.tie_lo_pins .push_back (RTLIL::escape_id (pin->args [0 ]));
@@ -131,20 +134,27 @@ static std::pair<std::optional<ClockGateCell>, std::optional<ClockGateCell>>
131134 if (dir->value == " internal" )
132135 continue ;
133136
134- log_error (" Malformed liberty file - extra pin %s in cell %s\n " ,
137+ log_warning (" Malformed liberty file - extra pin %s in cell %s\n " ,
135138 pin->args [0 ].c_str (), cell_name.c_str ());
139+ continue ;
136140 }
137141 }
138142
139- if (icg_interface.clk_in_pin .empty ())
140- log_error (" Malformed liberty file - missing clock_gate_clock_pin in cell %s" ,
143+ if (icg_interface.clk_in_pin .empty ()) {
144+ log_warning (" Malformed liberty file - missing clock_gate_clock_pin in cell %s" ,
141145 cell_name.c_str ());
142- if (icg_interface.clk_out_pin .empty ())
143- log_error (" Malformed liberty file - missing clock_gate_out_pin in cell %s" ,
146+ continue ;
147+ }
148+ if (icg_interface.clk_out_pin .empty ()) {
149+ log_warning (" Malformed liberty file - missing clock_gate_out_pin in cell %s" ,
144150 cell_name.c_str ());
145- if (icg_interface.ce_pin .empty ())
146- log_error (" Malformed liberty file - missing clock_gate_enable_pin in cell %s" ,
151+ continue ;
152+ }
153+ if (icg_interface.ce_pin .empty ()) {
154+ log_warning (" Malformed liberty file - missing clock_gate_enable_pin in cell %s" ,
147155 cell_name.c_str ());
156+ continue ;
157+ }
148158
149159 double area = 0 ;
150160 const LibertyAst *ar = cell->find (" area" );
@@ -179,11 +189,11 @@ static std::pair<std::optional<ClockGateCell>, std::optional<ClockGateCell>>
179189 std::optional<ClockGateCell> pos;
180190 std::optional<ClockGateCell> neg;
181191 if (best_pos) {
182- log (" Selected rising edge ICG %s\n " , best_pos->name .c_str ());
192+ log (" Selected rising edge ICG %s from Liberty file \n " , best_pos->name .c_str ());
183193 pos.emplace (*best_pos);
184194 }
185195 if (best_neg) {
186- log (" Selected falling edge ICG %s\n " , best_neg->name .c_str ());
196+ log (" Selected falling edge ICG %s from Liberty file \n " , best_neg->name .c_str ());
187197 neg.emplace (*best_neg);
188198 }
189199 return std::make_pair (pos, neg);
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