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Merge pull request #4332 from YosysHQ/krys/help_docs
Add docs generation from cells help output
2 parents 9432e97 + e9d9e92 commit f137509

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.github/workflows/prepare-docs.yml

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docs/source/_images
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docs/source/code_examples
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- name: Install doc prereqs
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shell: bash
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run: |
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make docs/reqs
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- name: Test build docs
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shell: bash
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run: |

Makefile

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# also others, but so long as it doesn't fail this is enough to know we tried
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docs/source/cmd/abc.rst: $(TARGETS) $(EXTRA_TARGETS)
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mkdir -p docs/source/cmd
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./$(PROGRAM_PREFIX)yosys -p 'help -write-rst-command-reference-manual'
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$(Q) mkdir -p docs/source/cmd
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$(Q) mkdir -p temp/docs/source/cmd
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$(Q) cd temp && ./../$(PROGRAM_PREFIX)yosys -p 'help -write-rst-command-reference-manual'
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$(Q) rsync -rc temp/docs/source/cmd docs/source
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$(Q) rm -rf temp
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docs/source/cell/word_add.rst: $(TARGETS) $(EXTRA_TARGETS)
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$(Q) mkdir -p docs/source/cell
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$(Q) mkdir -p temp/docs/source/cell
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$(Q) cd temp && ./../$(PROGRAM_PREFIX)yosys -p 'help -write-rst-cells-manual'
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$(Q) rsync -rc temp/docs/source/cell docs/source
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$(Q) rm -rf temp
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docs/source/generated/cells.json: docs/source/generated $(TARGETS) $(EXTRA_TARGETS)
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$(Q) ./$(PROGRAM_PREFIX)yosys -p 'help -dump-cells-json $@'
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PHONY: docs/gen_examples docs/gen_images docs/guidelines docs/usage docs/reqs
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docs/gen_examples: $(TARGETS)
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$(Q) $(MAKE) -C docs reqs
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.PHONY: docs/prep
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docs/prep: docs/source/cmd/abc.rst docs/gen_examples docs/gen_images docs/guidelines docs/usage
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docs/prep: docs/source/cmd/abc.rst docs/source/generated/cells.json docs/gen_examples docs/gen_images docs/guidelines docs/usage
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DOC_TARGET ?= html
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docs: docs/prep

docs/source/_static/favico.png

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docs/source/_static/yosyshq.css

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docs/source/_templates/page.html

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docs/source/appendix.rst

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docs/source/appendix/auxlibs.rst

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The files in ``libs/ezsat`` provide a library for simplifying generating CNF
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formulas for SAT solvers. It also contains bindings of MiniSAT. The ezSAT
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library is written by C. Wolf. It is used by the :cmd:ref:`sat` pass (see
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library is written by C. Wolf. It is used by the `sat` pass (see
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:doc:`/cmd/sat`).
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fst
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---
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``libfst`` files from `gtkwave`_ are included in ``libs/fst`` to support
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reading/writing signal traces from/to the GTKWave developed FST format. This is
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primarily used in the :cmd:ref:`sim` command.
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primarily used in the `sim` command.
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.. _gtkwave: https://github.com/gtkwave/gtkwave
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json11
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------
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For reading/writing designs from/to JSON, :cmd:ref:`read_json` and
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:cmd:ref:`write_json` should be used. For everything else there is the `json11
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For reading/writing designs from/to JSON, `read_json` and
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`write_json` should be used. For everything else there is the `json11
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library`_:
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json11 is a tiny JSON library for C++11, providing JSON parsing and
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serialization.
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This library is used for outputting machine-readable statistics (:cmd:ref:`stat`
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with ``-json`` flag), using the RPC frontend (:cmd:ref:`connect_rpc`), and the
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This library is used for outputting machine-readable statistics (`stat`
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with ``-json`` flag), using the RPC frontend (`connect_rpc`), and the
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yosys-witness ``yw`` format.
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.. _json11 library: https://github.com/dropbox/json11
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-------
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The files in ``libs/minisat`` provide a high-performance SAT solver, used by the
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:cmd:ref:`sat` command.
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`sat` command.
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SHA1
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----

docs/source/appendix/env_vars.rst

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``HOME``
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Yosys command history is stored in :file:`$HOME/.yosys_history`. Graphics
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(from :cmd:ref:`show` and :cmd:ref:`viz` commands) will output to this
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(from `show` and `viz` commands) will output to this
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directory by default. This environment variable is also used in some cases
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for resolving filenames with :file:`~`.
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docs/source/yosys_internals/formats/rtlil_text.rst renamed to docs/source/appendix/rtlil_text.rst

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Declares a cell, with zero or more attributes, with the given identifier and
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type in the enclosing module.
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Cells perform functions on input signals. See
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:doc:`/yosys_internals/formats/cell_library` for a detailed list of cell types.
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Cells perform functions on input signals. See :doc:`/cell_index` for a detailed
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list of cell types.
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.. code:: BNF
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.. role:: verilog(code)
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:language: Verilog
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Combinatorial cells (combined)
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------------------------------
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These cells combine two or more combinatorial cells (simple) into a single cell.
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.. table:: Cell types for gate level combinatorial cells (combined)
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======================================= =============
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Verilog Cell Type
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======================================= =============
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:verilog:`Y = A & ~B` `$_ANDNOT_`
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:verilog:`Y = A | ~B` `$_ORNOT_`
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:verilog:`Y = ~((A & B) | C)` `$_AOI3_`
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:verilog:`Y = ~((A | B) & C)` `$_OAI3_`
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:verilog:`Y = ~((A & B) | (C & D))` `$_AOI4_`
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:verilog:`Y = ~((A | B) & (C | D))` `$_OAI4_`
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:verilog:`Y = ~(S ? B : A)` `$_NMUX_`
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(see below) `$_MUX4_`
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(see below) `$_MUX8_`
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(see below) `$_MUX16_`
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======================================= =============
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The `$_MUX4_`, `$_MUX8_` and `$_MUX16_` cells are used to model wide muxes, and
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correspond to the following Verilog code:
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.. code-block:: verilog
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:force:
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// $_MUX4_
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assign Y = T ? (S ? D : C) :
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(S ? B : A);
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// $_MUX8_
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assign Y = U ? T ? (S ? H : G) :
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(S ? F : E) :
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T ? (S ? D : C) :
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(S ? B : A);
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// $_MUX16_
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assign Y = V ? U ? T ? (S ? P : O) :
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(S ? N : M) :
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T ? (S ? L : K) :
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(S ? J : I) :
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U ? T ? (S ? H : G) :
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(S ? F : E) :
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T ? (S ? D : C) :
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(S ? B : A);
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.. autocellgroup:: comb_combined
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:members:
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:source:
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:linenos:

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