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handle some cases of hdlname attribute on private objects #4851

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Merged
merged 3 commits into from
Jan 20, 2025
Merged

handle some cases of hdlname attribute on private objects #4851

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17d4579
ModuleHdlnameIndex: handle objects with private name and hdlname attr…
nakengelhardt Jan 15, 2025
d640157
fix some cases of hdlname being added to objects with private names
nakengelhardt Jan 15, 2025
a5ba1d2
fix bugs in handling last id in hdlname to scopename conversion
nakengelhardt Jan 16, 2025
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3 changes: 2 additions & 1 deletion frontends/verific/verific.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -1464,7 +1464,8 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
log("Importing module %s.\n", RTLIL::id2cstr(module->name));
}
import_attributes(module->attributes, nl, nl);
module->set_string_attribute(ID::hdlname, nl->CellBaseName());
if (module->name.isPublic())
module->set_string_attribute(ID::hdlname, nl->CellBaseName());
module->set_string_attribute(ID(library), nl->Owner()->Owner()->Name());
#ifdef VERIFIC_VHDL_SUPPORT
if (nl->IsFromVhdl()) {
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17 changes: 12 additions & 5 deletions kernel/scopeinfo.h
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Original file line number Diff line number Diff line change
Expand Up @@ -337,12 +337,14 @@ template<typename O>
std::vector<IdString> parse_hdlname(const O* object)
{
std::vector<IdString> path;
if (!object->name.isPublic())
return path;
for (auto const &item : object->get_hdlname_attribute())
path.push_back("\\" + item);
if (path.empty())
if (path.empty() && object->name.isPublic())
path.push_back(object->name);
if (!path.empty() && !(object->name.isPublic() || object->name.begins_with("$paramod") || object->name.begins_with("$abstract"))) {
path.pop_back();
path.push_back(object->name);
}
return path;
}

Expand All @@ -351,17 +353,22 @@ std::pair<std::vector<IdString>, IdString> parse_scopename(const O* object)
{
std::vector<IdString> path;
IdString trailing = object->name;
if (object->name.isPublic()) {
if (object->name.isPublic() || object->name.begins_with("$paramod") || object->name.begins_with("$abstract")) {
for (auto const &item : object->get_hdlname_attribute())
path.push_back("\\" + item);
if (!path.empty()) {
trailing = path.back();
path.pop_back();
}
} else if (object->has_attribute(ID::hdlname)) {
for (auto const &item : object->get_hdlname_attribute())
path.push_back("\\" + item);
if (!path.empty()) {
path.pop_back();
}
} else {
for (auto const &item : split_tokens(object->get_string_attribute(ID(scopename)), " "))
path.push_back("\\" + item);

}
return {path, trailing};
}
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14 changes: 14 additions & 0 deletions passes/fsm/fsm_extract.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -377,6 +377,13 @@ static void extract_fsm(RTLIL::Wire *wire)
fsm_cell->setPort(ID::CTRL_OUT, ctrl_out);
fsm_cell->parameters[ID::NAME] = RTLIL::Const(wire->name.str());
fsm_cell->attributes = wire->attributes;
if(fsm_cell->attributes.count(ID::hdlname)) {
auto hdlname = fsm_cell->get_hdlname_attribute();
hdlname.pop_back();
fsm_cell->set_hdlname_attribute(hdlname);
fsm_cell->set_string_attribute(ID(scopename), fsm_cell->get_string_attribute(ID::hdlname));
fsm_cell->attributes.erase(ID::hdlname);
}
fsm_data.copy_to_cell(fsm_cell);

// rename original state wire
Expand All @@ -385,6 +392,13 @@ static void extract_fsm(RTLIL::Wire *wire)
wire->attributes.erase(ID::fsm_encoding);
wire->name = stringf("$fsm$oldstate%s", wire->name.c_str());
module->wires_[wire->name] = wire;
if(wire->attributes.count(ID::hdlname)) {
auto hdlname = wire->get_hdlname_attribute();
hdlname.pop_back();
wire->set_hdlname_attribute(hdlname);
wire->set_string_attribute(ID(scopename), wire->get_string_attribute(ID::hdlname));
wire->attributes.erase(ID::hdlname);
}

// unconnect control outputs from old drivers

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