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Enable LCD (SPI) output on Boot for Sipeed NEZHA #8
Description
Thank you for such great and easy build tool setup!!!!
Please advise on how to enable this 1.14" 135×240 SPI LCD (It is my first time with buildroot)
https://linux-sunxi.org/Sipeed_Lichee_RV
And 40pin LCD used by licheepi nano (480x272), I am using the nezha cm with dock + display shell ( https://www.aliexpress.com/i/1005003803176537.html)
Here is the default section of of display dts.
Buildroot-YuzukiSBC/buildroot/board/awol/nezha/dts/linux/sun20i-d1-nezha-linux.dts
what change should be made?
Thank you!
/*----------------------------------------------------------------------------------
disp init configuration
disp_mode (0:screen0<screen0,fb0>)
screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
(5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020)
screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
screen0_output_range (for hdmi, 0:default 1:full 2:limited)
screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan)
screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
fb0_scaler_mode_enable(scaler mode enable, used FE)
fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
lcdx_backlight (lcd init backlight,the range:[0,256],default:197
lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
lcd0_contrast (LCD contrast, 0~100)
lcd0_saturation (LCD saturation, 0~100)
lcd0_hue (LCD hue, 0~100)
framebuffer software rotation setting:
disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y,
set fbX_height to lcd_x)
degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
devX_output_type : config output type in bootGUI framework in UBOOT-2018.
(0:none; 1:lcd; 2:tv; 4:hdmi;)
devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
devX_screen_id : config display index of bootGUI framework in UBOOT-2018
devX_do_hpd : whether do hpd detectation or not in UBOOT-2018
chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6
channel, 1:dual display with 4 channel in main display and 2 channel in second
display, 2:dual display with 3 channel in main display and 3 channel in second
in display.
----------------------------------------------------------------------------------*/
&disp {
disp_init_enable = <1>;
disp_mode = <0>;
screen0_output_type = <1>;
screen0_output_mode = <4>;
screen1_output_type = <3>;
screen1_output_mode = <10>;
screen1_output_format = <0>;
screen1_output_bits = <0>;
screen1_output_eotf = <4>;
screen1_output_cs = <257>;
screen1_output_dvi_hdmi = <2>;
screen1_output_range = <2>;
screen1_output_scan = <0>;
screen1_output_aspect_ratio = <8>;
dev0_output_type = <1>;
dev0_output_mode = <4>;
dev0_screen_id = <0>;
dev0_do_hpd = <0>;
dev1_output_type = <4>;
dev1_output_mode = <10>;
dev1_screen_id = <1>;
dev1_do_hpd = <1>;
def_output_dev = <0>;
hdmi_mode_check = <1>;
fb0_format = <0>;
fb0_width = <0>;
fb0_height = <0>;
fb1_format = <0>;
fb1_width = <0>;
fb1_height = <0>;
chn_cfg_mode = <1>;
disp_para_zone = <1>;
/*VCC-LCD*/
/* dc1sw-supply = <®_dc1sw>;*/
/*VCC-DSI*/
/* eldo3-supply = <®_eldo3>;*/
/*VCC-PD*/
/* dcdc1-supply = <®_dcdc1>;*/
};
/*----------------------------------------------------------------------------------
;lcd0 configuration
;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree
;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode
;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
;lcd_x: lcd horizontal resolution
;lcd_y: lcd vertical resolution
;lcd_width: width of lcd in mm
;lcd_height: height of lcd in mm
;lcd_dclk_freq: in MHZ unit
;lcd_pwm_freq: in HZ unit
;lcd_pwm_pol: lcd backlight PWM polarity
;lcd_pwm_max_limit lcd backlight PWM max limit(<=255)
;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel);
;lcd_ht: hsync total cycle(pixel)
;lcd_vbp: vsync back porch(line) + vysnc plus width(line)
;lcd_vt: vysnc total cycle(line)
;lcd_hspw: hsync plus width(pixel)
;lcd_vspw: vysnc plus width(pixel)
;lcd_lvds_if: 0:single link; 1:dual link
;lcd_lvds_colordepth: 0:8bit; 1:6bit
;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode
;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
; 8~11bit:dclk phase; 12~15bit:de phase)
;lcd_gamma_en lcd gamma correction enable
;lcd_bright_curve_en lcd bright curve correction enable
;lcd_cmap_en lcd color map function enable
;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10;
; decrease it while lcd is not bright enough; increase while lcd is too bright
;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch)
;Pin setting for special function ie.LVDS, RGB data or vsync
; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
;Pin setting for gpio:
; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level>
;Pin setting for backlight enable pin
; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level>
;fsync setting, pulse to csi
;lcd_fsync_en (0:disable fsync,1:enable)
;lcd_fsync_act_time (active time of fsync, unit:pixel)
;lcd_fsync_dis_time (disactive time of fsync, unit:pixel)
;lcd_fsync_pol (0:positive;1:negative)
;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
pull up or pull down(default 0), driver level(default 1), data>
;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead
;For rgb24: use rgb24_pins_a and rgb24_pins_b instead
;For lvds1: use lvds1_pins_a and lvds1_pins_b instead
;For lvds0: use lvds0_pins_a and lvds0_pins_b instead
;----------------------------------------------------------------------------------*/
&lcd0 {
lcd_used = <1>;
lcd_driver_name = "tft08006";
lcd_backlight = <100>;
lcd_if = <4>;
lcd_x = <800>;
lcd_y = <1280>;
lcd_width = <52>;
lcd_height = <52>;
lcd_dclk_freq = <70>;
lcd_pwm_used = <1>;
lcd_pwm_ch = <2>;
lcd_pwm_freq = <1000>;
lcd_pwm_pol = <0>;
lcd_pwm_max_limit = <255>;
lcd_hbp = <32>;
lcd_ht = <868>;
lcd_hspw = <4>;
lcd_vbp = <12>;
lcd_vt = <1311>;
lcd_vspw = <4>;
lcd_dsi_if = <0>;
lcd_dsi_lane = <4>;
lcd_lvds_if = <0>;
lcd_lvds_colordepth = <0>;
lcd_lvds_mode = <0>;
lcd_frm = <0>;
lcd_hv_clk_phase = <0>;
lcd_hv_sync_polarity= <0>;
lcd_io_phase = <0x0000>;
lcd_gamma_en = <0>;
lcd_bright_curve_en = <0>;
lcd_cmap_en = <0>;
lcd_fsync_en = <0>;
lcd_fsync_act_time = <1000>;
lcd_fsync_dis_time = <1000>;
lcd_fsync_pol = <0>;
deu_mode = <0>;
lcdgamma4iep = <22>;
smart_color = <90>;
lcd_gpio_0 = <&pio PG 13 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&dsi4lane_pins_a>;
pinctrl-1 = <&dsi4lane_pins_b>;
};