samples: drivers: uart: async_api: update test configurations

- Deactivate cache to avoid the TX buffer being placed in a
  non-cacheable memory region for NUCLEO_F746ZG.
- Add missing configuration in the overlay for STM32F3-DISCO.
- Change USART1 to USART2 to avoid conflicts on NUCLEO_F103RB.


Signed-off-by: Fabrice DJIATSA <[email protected]>

Author: djiatsaf-st

samples/drivers/uart/async_api/boards/nucleo_f103rb.overlay

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-dut: &usart1 {
-	dmas = <&dma1 4 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
-	       <&dma1 5 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
+dut: &usart2 {
+	dmas = <&dma1 7 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
+	       <&dma1 6 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
 	dma-names = "tx", "rx";
 };

samples/drivers/uart/async_api/boards/nucleo_f746zg.conf

@@ -0,0 +1 @@
+CONFIG_DCACHE=n

samples/drivers/uart/async_api/boards/stm32f3_disco.overlay

@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+dut: &usart1 {
+	dmas = <&dma1 4 STM32_DMA_PERIPH_TX>,
+	       <&dma1 5 STM32_DMA_PERIPH_RX>;
+	dma-names = "tx", "rx";
+};