test: ram_context_for_isr: exclude imx95 m7

i.MX95 M7 supports multi-level interrupt.
Current ram_context_for_isr test does not cover multi-level interrupt.
So exclude i.MX95 M7.

Signed-off-by: Qiang Zhao <[email protected]>

Author: ZhaoQiang-b45475

tests/application_development/ram_context_for_isr/testcase.yaml

@@ -11,6 +11,8 @@ tests:
       - mps3/corstone310/fvp
       - mps4/corstone315/fvp
       - mps4/corstone320/fvp
+      - imx95_evk/mimx9596/m7
+      - imx95_evk/mimx9596/m7/ddr
       - imx943_evk/mimx94398/m33
       - imx943_evk/mimx94398/m33/ddr
       - frdm_mcxc444/mcxc444