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tact1m4n3tact1m4n3
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Housekeeping (#626)
1 parent 8be7c0f commit 0d314bc

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10 files changed

+74
-75
lines changed

10 files changed

+74
-75
lines changed

‎core/src/cpus/avr5.zig‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
const std = @import("std");
22
const microzig = @import("microzig");
3-
const root = @import("root");
43

54
pub const interrupt = struct {
65
pub fn enable_interrupts() void {

‎core/src/cpus/cortex_m.zig‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,4 @@
11
const std = @import("std");
2-
const root = @import("root");
3-
const microzig_options = root.microzig_options;
42
const microzig = @import("microzig");
53
const mmio = microzig.mmio;
64
const app = microzig.app;
@@ -521,11 +519,11 @@ pub const interrupt = struct {
521519
}
522520

523521
pub inline fn has_ram_vectors() bool {
524-
return @hasField(@TypeOf(microzig_options.cpu), "ram_vectors") and microzig_options.cpu.ram_vectors;
522+
return @hasField(@TypeOf(microzig.options.cpu), "ram_vectors") and microzig.options.cpu.ram_vectors;
525523
}
526524

527525
pub inline fn has_ram_vectors_section() bool {
528-
return @hasField(@TypeOf(microzig_options.cpu), "has_ram_vectors_section") and microzig_options.cpu.has_ram_vectors_section;
526+
return @hasField(@TypeOf(microzig.options.cpu), "has_ram_vectors_section") and microzig.options.cpu.has_ram_vectors_section;
529527
}
530528

531529
pub fn set_handler(int: ExternalInterrupt, handler: ?Handler) ?Handler {
@@ -670,8 +668,8 @@ pub const startup_logic = struct {
670668
.Reset = .{ .c = microzig.cpu.startup_logic._start },
671669
};
672670

673-
for (@typeInfo(@TypeOf(microzig_options.interrupts)).@"struct".fields) |field| {
674-
const maybe_handler = @field(microzig_options.interrupts, field.name);
671+
for (@typeInfo(@TypeOf(microzig.options.interrupts)).@"struct".fields) |field| {
672+
const maybe_handler = @field(microzig.options.interrupts, field.name);
675673
if (maybe_handler) |handler| {
676674
@field(tmp, field.name) = handler;
677675
}

‎core/src/cpus/riscv32.zig‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
const std = @import("std");
2-
const root = @import("root");
32
const microzig = @import("microzig");
43

54
const riscv32_common = @import("riscv32-common");
@@ -35,7 +34,7 @@ pub const startup_logic = struct {
3534
extern fn microzig_main() noreturn;
3635

3736
pub fn _start() linksection("microzig_flash_start") callconv(.c) noreturn {
38-
root.initialize_system_memories();
37+
microzig.utilities.initialize_system_memories();
3938

4039
microzig_main();
4140
}

‎core/src/microzig.zig‎

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ pub const panic = std.debug.FullPanic(struct {
5151

5252
// Attach a breakpoint. this might trigger another panic internally, so
5353
// only do that if requested.
54-
if (root.microzig_options.breakpoint_in_panic) {
54+
if (options.breakpoint_in_panic) {
5555
std.log.info("triggering breakpoint...", .{});
5656
@breakpoint();
5757
}
@@ -92,8 +92,17 @@ pub const Options = struct {
9292

9393
/// If true, will trigger a breakpoint in the default panic handler.
9494
breakpoint_in_panic: bool = false,
95+
96+
/// The default panic called when main returns an error will include the
97+
/// name of the error. If this option is true, a panic will be invoked with
98+
/// only a static message, avoiding the call to @errorName. This can help
99+
/// reduce code size as the string literals for error names no longer have to
100+
/// be included in the executable.
101+
simple_panic_if_main_errors: bool = false,
95102
};
96103

104+
pub const options: Options = if (@hasDecl(app, "microzig_options")) app.microzig_options else .{};
105+
97106
/// Hangs the processor and will stop doing anything useful. Use with caution!
98107
pub fn hang() noreturn {
99108
cpu.interrupt.disable_interrupts();

‎core/src/start.zig‎

Lines changed: 4 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -6,16 +6,14 @@ const app = @import("app");
66
// Use microzig panic handler if not defined by an application
77
pub const panic = if (!@hasDecl(app, "panic")) microzig.panic else app.panic;
88

9-
pub const microzig_options: microzig.Options = if (@hasDecl(app, "microzig_options")) app.microzig_options else .{};
10-
119
// Conditionally provide a default no-op logFn if app does not have one
1210
// defined. Parts of microzig use the stdlib logging facility and
1311
// compilations will now fail on freestanding systems that use it but do
1412
// not explicitly set `root.std_options.logFn`
1513
pub const std_options: std.Options = .{
16-
.log_level = microzig_options.log_level,
17-
.log_scope_levels = microzig_options.log_scope_levels,
18-
.logFn = microzig_options.logFn,
14+
.log_level = microzig.options.log_level,
15+
.log_scope_levels = microzig.options.log_scope_levels,
16+
.logFn = microzig.options.logFn,
1917
};
2018

2119
// Startup logic:
@@ -72,7 +70,7 @@ export fn microzig_main() noreturn {
7270

7371
const msg_base = "main() returned error.";
7472

75-
if (!builtin.strip_debug_info) {
73+
if (!microzig.options.simple_panic_if_main_errors) {
7674
const max_error_size = comptime blk: {
7775
var max_error_size: usize = 0;
7876
const err_type = @typeInfo(return_type).error_union.error_set;
@@ -98,37 +96,3 @@ export fn microzig_main() noreturn {
9896
// Main returned, just hang around here a bit.
9997
microzig.hang();
10098
}
101-
102-
/// Contains references to the microzig .data and .bss sections, also
103-
/// contains the initial load address for .data if it is in flash.
104-
pub const sections = struct {
105-
// it looks odd to just use a u8 here, but in C it's common to use a
106-
// char when linking these values from the linkerscript. What's
107-
// important is the addresses of these values.
108-
extern var microzig_data_start: u8;
109-
extern var microzig_data_end: u8;
110-
extern var microzig_bss_start: u8;
111-
extern var microzig_bss_end: u8;
112-
extern const microzig_data_load_start: u8;
113-
};
114-
115-
pub fn initialize_system_memories() void {
116-
// fill .bss with zeroes
117-
{
118-
const bss_start: [*]u8 = @ptrCast(&sections.microzig_bss_start);
119-
const bss_end: [*]u8 = @ptrCast(&sections.microzig_bss_end);
120-
const bss_len = @intFromPtr(bss_end) - @intFromPtr(bss_start);
121-
122-
@memset(bss_start[0..bss_len], 0);
123-
}
124-
125-
// load .data from flash
126-
{
127-
const data_start: [*]u8 = @ptrCast(&sections.microzig_data_start);
128-
const data_end: [*]u8 = @ptrCast(&sections.microzig_data_end);
129-
const data_len = @intFromPtr(data_end) - @intFromPtr(data_start);
130-
const data_src: [*]const u8 = @ptrCast(&sections.microzig_data_load_start);
131-
132-
@memcpy(data_start[0..data_len], data_src[0..data_len]);
133-
}
134-
}

‎core/src/utilities.zig‎

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,43 @@
11
const std = @import("std");
22
const microzig = @import("microzig.zig");
33

4+
/// Fills .bss with zeroes and copies .data from flash into ram. May be called
5+
/// by the cpu module at startup.
6+
pub fn initialize_system_memories() void {
7+
8+
// Contains references to the microzig .data and .bss sections, also
9+
// contains the initial load address for .data if it is in flash.
10+
const sections = struct {
11+
// it looks odd to just use a u8 here, but in C it's common to use a
12+
// char when linking these values from the linkerscript. What's
13+
// important is the addresses of these values.
14+
extern var microzig_data_start: u8;
15+
extern var microzig_data_end: u8;
16+
extern var microzig_bss_start: u8;
17+
extern var microzig_bss_end: u8;
18+
extern const microzig_data_load_start: u8;
19+
};
20+
21+
// fill .bss with zeroes
22+
{
23+
const bss_start: [*]u8 = @ptrCast(&sections.microzig_bss_start);
24+
const bss_end: [*]u8 = @ptrCast(&sections.microzig_bss_end);
25+
const bss_len = @intFromPtr(bss_end) - @intFromPtr(bss_start);
26+
27+
@memset(bss_start[0..bss_len], 0);
28+
}
29+
30+
// load .data from flash
31+
{
32+
const data_start: [*]u8 = @ptrCast(&sections.microzig_data_start);
33+
const data_end: [*]u8 = @ptrCast(&sections.microzig_data_end);
34+
const data_len = @intFromPtr(data_end) - @intFromPtr(data_start);
35+
const data_src: [*]const u8 = @ptrCast(&sections.microzig_data_load_start);
36+
37+
@memcpy(data_start[0..data_len], data_src[0..data_len]);
38+
}
39+
}
40+
441
/// A helper class that allows operating on a slice of slices
542
/// with similar operations to those of a slice.
643
pub fn Slice_Vector(comptime Slice: type) type {

‎port/espressif/esp/src/cpus/esp_riscv.zig‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
const std = @import("std");
22
const microzig = @import("microzig");
3-
const root = @import("root");
4-
const microzig_options = root.microzig_options;
53

64
const cpu_config = @import("cpu-config");
75
const riscv32_common = @import("riscv32-common");
@@ -273,7 +271,7 @@ pub const startup_logic = switch (cpu_config.boot_mode) {
273271
\\.option pop
274272
);
275273

276-
root.initialize_system_memories();
274+
microzig.utilities.initialize_system_memories();
277275

278276
init_interrupts();
279277

@@ -399,13 +397,13 @@ fn _vector_table() align(256) linksection(".ram_text") callconv(.naked) void {
399397
comptime {
400398
// TODO: make a better default exception handler
401399
@export(
402-
microzig_options.interrupts.Exception orelse &unhandled,
400+
microzig.options.interrupts.Exception orelse &unhandled,
403401
.{ .name = "_exception_handler" },
404402
);
405403

406404
for (std.meta.fieldNames(Interrupt)) |field_name| {
407405
@export(
408-
@field(microzig_options.interrupts, field_name) orelse &unhandled,
406+
@field(microzig.options.interrupts, field_name) orelse &unhandled,
409407
.{ .name = std.fmt.comptimePrint("_{s}_handler", .{field_name}) },
410408
);
411409
}

‎port/raspberrypi/rp2xxx/src/cpus/hazard3.zig‎

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,4 @@
11
const std = @import("std");
2-
const root = @import("root");
3-
const microzig_options = root.microzig_options;
42
const microzig = @import("microzig");
53
const riscv32_common = @import("riscv32-common");
64

@@ -129,11 +127,11 @@ pub const interrupt = struct {
129127
}
130128

131129
pub inline fn has_ram_vectors() bool {
132-
return @hasField(@TypeOf(microzig_options.cpu), "ram_vectors") and microzig_options.cpu.ram_vectors;
130+
return @hasField(@TypeOf(microzig.options.cpu), "ram_vectors") and microzig.options.cpu.ram_vectors;
133131
}
134132

135133
pub inline fn has_ram_vectors_section() bool {
136-
return @hasField(@TypeOf(microzig_options.cpu), "has_ram_vectors_section") and microzig_options.cpu.has_ram_vectors_section;
134+
return @hasField(@TypeOf(microzig.options.cpu), "has_ram_vectors_section") and microzig.options.cpu.has_ram_vectors_section;
137135
}
138136

139137
pub fn set_handler(int: ExternalInterrupt, handler: ?Handler) ?Handler {
@@ -203,7 +201,7 @@ pub const startup_logic = struct {
203201

204202
pub export fn _start_c() callconv(.c) noreturn {
205203
if (!microzig.config.ram_image) {
206-
root.initialize_system_memories();
204+
microzig.utilities.initialize_system_memories();
207205
}
208206

209207
// Move vector table to RAM if requested
@@ -234,10 +232,10 @@ pub const startup_logic = struct {
234232
pub export fn _vector_table() align(64) linksection("core_vectors") callconv(.naked) noreturn {
235233
comptime {
236234
// NOTE: using the union variant .naked here is fine because both variants have the same layout
237-
@export(if (microzig_options.interrupts.Exception) |handler| handler.naked else &unhandled_interrupt, .{ .name = "_exception_handler" });
238-
@export(if (microzig_options.interrupts.MachineSoftware) |handler| handler.naked else &unhandled_interrupt, .{ .name = "_machine_software_handler" });
239-
@export(if (microzig_options.interrupts.MachineTimer) |handler| handler.naked else &unhandled_interrupt, .{ .name = "_machine_timer_handler" });
240-
@export(if (microzig_options.interrupts.MachineExternal) |handler| handler.naked else &machine_external_interrupt, .{ .name = "_machine_external_handler" });
235+
@export(if (microzig.options.interrupts.Exception) |handler| handler.naked else &unhandled_interrupt, .{ .name = "_exception_handler" });
236+
@export(if (microzig.options.interrupts.MachineSoftware) |handler| handler.naked else &unhandled_interrupt, .{ .name = "_machine_software_handler" });
237+
@export(if (microzig.options.interrupts.MachineTimer) |handler| handler.naked else &unhandled_interrupt, .{ .name = "_machine_timer_handler" });
238+
@export(if (microzig.options.interrupts.MachineExternal) |handler| handler.naked else &machine_external_interrupt, .{ .name = "_machine_external_handler" });
241239
}
242240

243241
asm volatile (
@@ -260,7 +258,7 @@ pub const startup_logic = struct {
260258
var temp: [vector_count]Handler = @splat(microzig.interrupt.unhandled);
261259

262260
for (@typeInfo(ExternalInterrupt).@"enum".fields) |field| {
263-
if (@field(microzig_options.interrupts, field.name)) |handler| {
261+
if (@field(microzig.options.interrupts, field.name)) |handler| {
264262
temp[field.value] = handler;
265263
}
266264
}

‎port/raspberrypi/rp2xxx/src/hal/bootmeta.zig‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
/// Documentation taken from section 5.9.5.1 of the rp2350 datasheet.
22
const std = @import("std");
3-
const root = @import("root");
43
const microzig = @import("microzig");
54
const arch = @import("compatibility.zig").arch;
65

@@ -12,7 +11,7 @@ pub const image_def_block = if (microzig.config.ram_image and arch == .arm) Bloc
1211
.image_def = .{
1312
.image_type_flags = .{
1413
.image_type = .exe,
15-
.exe_security = root.microzig_options.hal.bootmeta.image_def_exe_security,
14+
.exe_security = microzig.options.hal.bootmeta.image_def_exe_security,
1615
.cpu = .arm,
1716
.chip = .RP2350,
1817
.try_before_you_buy = false,
@@ -25,22 +24,22 @@ pub const image_def_block = if (microzig.config.ram_image and arch == .arm) Bloc
2524
.sp = microzig.cpu.startup_logic._vector_table.initial_stack_pointer,
2625
},
2726
},
28-
.link = root.microzig_options.hal.bootmeta.next_block,
27+
.link = microzig.options.hal.bootmeta.next_block,
2928
} else Block(extern struct {
3029
image_def: ImageDef,
3130
}){
3231
.items = .{
3332
.image_def = .{
3433
.image_type_flags = .{
3534
.image_type = .exe,
36-
.exe_security = root.microzig_options.hal.bootmeta.image_def_exe_security,
35+
.exe_security = microzig.options.hal.bootmeta.image_def_exe_security,
3736
.cpu = std.meta.stringToEnum(ImageDef.ImageTypeFlags.Cpu, @tagName(arch)).?,
3837
.chip = .RP2350,
3938
.try_before_you_buy = false,
4039
},
4140
},
4241
},
43-
.link = root.microzig_options.hal.bootmeta.next_block,
42+
.link = microzig.options.hal.bootmeta.next_block,
4443
};
4544

4645
comptime {

‎port/wch/ch32v/src/cpus/main.zig‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,4 @@
11
const std = @import("std");
2-
const root = @import("root");
3-
const microzig_options = root.microzig_options;
42
const microzig = @import("microzig");
53

64
const riscv32_common = @import("riscv32-common");
@@ -71,7 +69,7 @@ pub const interrupt = struct {
7169
pub inline fn enable(irq: Interrupt) void {
7270
comptime {
7371
const irq_name = @tagName(irq);
74-
if (@field(root.microzig_options.interrupts, irq_name) == null) {
72+
if (@field(microzig.options.interrupts, irq_name) == null) {
7573
@compileError(
7674
irq_name ++ " interrupt handler should be defined.\n" ++
7775
"Add to your main file:\n" ++
@@ -333,7 +331,7 @@ pub fn generate_vector_table() [vector_table_size()]InterruptHandler {
333331
const type_info = @typeInfo(Interrupt);
334332
const interrupts_list = type_info.@"enum".fields;
335333

336-
var temp: [vector_table_size()]InterruptHandler = @splat(microzig_options.interrupts.Exception orelse unhandled);
334+
var temp: [vector_table_size()]InterruptHandler = @splat(microzig.options.interrupts.Exception orelse unhandled);
337335
for (&temp, vector_table_offset..) |_, idx| {
338336
// Find name of the interrupt by its number.
339337
var name: ?[:0]const u8 = null;
@@ -345,7 +343,7 @@ pub fn generate_vector_table() [vector_table_size()]InterruptHandler {
345343
}
346344

347345
if (name) |n| {
348-
if (@field(microzig_options.interrupts, n)) |h| {
346+
if (@field(microzig.options.interrupts, n)) |h| {
349347
temp[idx - vector_table_offset] = h;
350348
}
351349
}

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