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UNRATIFIED RISC-V: Add 'Zimop' extension
[DO NOT MERGE] Until the 'Zimop' extension is frozen/ratified and final version number is determined, this patch should not be merged upstream. This commit uses version 0.1 as a placeholder. This commit adds support for "May Be Operations (MOP)" (Zimop) extension which adds 32 2-operand MOP instructions and 8 3-operand MOP instructions. By default, they are practically the same as "li rd, 0". However, if certain feature is supported (and optionally enabled), it is allowed to alter architectural state unlike HINT instructions. This commit is based on the TENTATIVE specification: <riscv/riscv-cfi#131> bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_z_ext): Add 'Zimop'. (riscv_multi_subset_supports): Support new instruction class. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * testsuite/gas/riscv/zimop.s: New test for 'Zimop'. * testsuite/gas/riscv/zimop.d: Likewise. * testsuite/gas/riscv/zimop-noarch.d: New test for architecture failure. * testsuite/gas/riscv/zimop-noarch.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_MOP_R_0, MASK_MOP_R_0, MATCH_MOP_R_1, MASK_MOP_R_1, MATCH_MOP_R_2, MASK_MOP_R_2, MATCH_MOP_R_3, MASK_MOP_R_3, MATCH_MOP_R_4, MASK_MOP_R_4, MATCH_MOP_R_5, MASK_MOP_R_5, MATCH_MOP_R_6, MASK_MOP_R_6, MATCH_MOP_R_7, MASK_MOP_R_7, MATCH_MOP_R_8, MASK_MOP_R_8, MATCH_MOP_R_9, MASK_MOP_R_9, MATCH_MOP_R_10, MASK_MOP_R_10, MATCH_MOP_R_11, MASK_MOP_R_11, MATCH_MOP_R_12, MASK_MOP_R_12, MATCH_MOP_R_13, MASK_MOP_R_13, MATCH_MOP_R_14, MASK_MOP_R_14, MATCH_MOP_R_15, MASK_MOP_R_15, MATCH_MOP_R_16, MASK_MOP_R_16, MATCH_MOP_R_17, MASK_MOP_R_17, MATCH_MOP_R_18, MASK_MOP_R_18, MATCH_MOP_R_19, MASK_MOP_R_19, MATCH_MOP_R_20, MASK_MOP_R_20, MATCH_MOP_R_21, MASK_MOP_R_21, MATCH_MOP_R_22, MASK_MOP_R_22, MATCH_MOP_R_23, MASK_MOP_R_23, MATCH_MOP_R_24, MASK_MOP_R_24, MATCH_MOP_R_25, MASK_MOP_R_25, MATCH_MOP_R_26, MASK_MOP_R_26, MATCH_MOP_R_27, MASK_MOP_R_27, MATCH_MOP_R_28, MASK_MOP_R_28, MATCH_MOP_R_29, MASK_MOP_R_29, MATCH_MOP_R_30, MASK_MOP_R_30, MATCH_MOP_R_31, MASK_MOP_R_31, MATCH_MOP_RR_0, MASK_MOP_RR_0, MATCH_MOP_RR_1, MASK_MOP_RR_1, MATCH_MOP_RR_2, MASK_MOP_RR_2, MATCH_MOP_RR_3, MASK_MOP_RR_3, MATCH_MOP_RR_4, MASK_MOP_RR_4, MATCH_MOP_RR_5, MASK_MOP_RR_5, MATCH_MOP_RR_6, MASK_MOP_RR_6, MATCH_MOP_RR_7, MASK_MOP_RR_7): New. * opcode/riscv.h (enum riscv_insn_class): Add new instruction class INSN_CLASS_ZIMOP. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Add new "may be" operations from the 'Zimop' extension near the bottom.
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‎bfd/elfxx-riscv.c‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1258,6 +1258,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
12581258
{"zifencei", ISA_SPEC_CLASS_20190608, 2, 0, 0 },
12591259
{"zihintntl", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
12601260
{"zihintpause", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 },
1261+
{"zimop", ISA_SPEC_CLASS_DRAFT, 0, 1, 0 },
12611262
{"zmmul", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
12621263
{"zawrs", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
12631264
{"zfa", ISA_SPEC_CLASS_DRAFT, 0, 1, 0 },
@@ -2403,6 +2404,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
24032404
|| riscv_subset_supports (rps, "zca")));
24042405
case INSN_CLASS_ZIHINTPAUSE:
24052406
return riscv_subset_supports (rps, "zihintpause");
2407+
case INSN_CLASS_ZIMOP:
2408+
return riscv_subset_supports (rps, "zimop");
24062409
case INSN_CLASS_M:
24072410
return riscv_subset_supports (rps, "m");
24082411
case INSN_CLASS_ZMMUL:
@@ -2613,6 +2616,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
26132616
return _("c' or `zca");
26142617
case INSN_CLASS_ZIHINTPAUSE:
26152618
return "zihintpause";
2619+
case INSN_CLASS_ZIMOP:
2620+
return "zimop";
26162621
case INSN_CLASS_M:
26172622
return "m";
26182623
case INSN_CLASS_ZMMUL:

‎gas/testsuite/gas/riscv/zimop.d‎

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
#as: -march=rv32i_zimop
2+
#objdump: -d
3+
4+
.*:[ ]+file format .*
5+
6+
Disassembly of section .text:
7+
8+
0+000 <target>:
9+
[ ]+[0-9a-f]+:[ ]+81c140f3[ ]+mop\.r\.0[ ]+ra,sp
10+
[ ]+[0-9a-f]+:[ ]+81d3c273[ ]+mop\.r\.1[ ]+tp,t2
11+
[ ]+[0-9a-f]+:[ ]+81e643f3[ ]+mop\.r\.2[ ]+t2,a2
12+
[ ]+[0-9a-f]+:[ ]+81f8c573[ ]+mop\.r\.3[ ]+a0,a7
13+
[ ]+[0-9a-f]+:[ ]+85cb46f3[ ]+mop\.r\.4[ ]+a3,s6
14+
[ ]+[0-9a-f]+:[ ]+85ddc873[ ]+mop\.r\.5[ ]+a6,s11
15+
[ ]+[0-9a-f]+:[ ]+85e049f3[ ]+mop\.r\.6[ ]+s3,zero
16+
[ ]+[0-9a-f]+:[ ]+85f2cb73[ ]+mop\.r\.7[ ]+s6,t0
17+
[ ]+[0-9a-f]+:[ ]+89c54cf3[ ]+mop\.r\.8[ ]+s9,a0
18+
[ ]+[0-9a-f]+:[ ]+89d7ce73[ ]+mop\.r\.9[ ]+t3,a5
19+
[ ]+[0-9a-f]+:[ ]+89ea4ff3[ ]+mop\.r\.10[ ]+t6,s4
20+
[ ]+[0-9a-f]+:[ ]+89fcc173[ ]+mop\.r\.11[ ]+sp,s9
21+
[ ]+[0-9a-f]+:[ ]+8dcf42f3[ ]+mop\.r\.12[ ]+t0,t5
22+
[ ]+[0-9a-f]+:[ ]+8dd1c473[ ]+mop\.r\.13[ ]+s0,gp
23+
[ ]+[0-9a-f]+:[ ]+8de445f3[ ]+mop\.r\.14[ ]+a1,s0
24+
[ ]+[0-9a-f]+:[ ]+8df6c773[ ]+mop\.r\.15[ ]+a4,a3
25+
[ ]+[0-9a-f]+:[ ]+c1c948f3[ ]+mop\.r\.16[ ]+a7,s2
26+
[ ]+[0-9a-f]+:[ ]+c1dbca73[ ]+mop\.r\.17[ ]+s4,s7
27+
[ ]+[0-9a-f]+:[ ]+c1ee4bf3[ ]+mop\.r\.18[ ]+s7,t3
28+
[ ]+[0-9a-f]+:[ ]+c1f0cd73[ ]+mop\.r\.19[ ]+s10,ra
29+
[ ]+[0-9a-f]+:[ ]+c5c34ef3[ ]+mop\.r\.20[ ]+t4,t1
30+
[ ]+[0-9a-f]+:[ ]+c5d5c073[ ]+mop\.r\.21[ ]+zero,a1
31+
[ ]+[0-9a-f]+:[ ]+c5e841f3[ ]+mop\.r\.22[ ]+gp,a6
32+
[ ]+[0-9a-f]+:[ ]+c5fac373[ ]+mop\.r\.23[ ]+t1,s5
33+
[ ]+[0-9a-f]+:[ ]+c9cd44f3[ ]+mop\.r\.24[ ]+s1,s10
34+
[ ]+[0-9a-f]+:[ ]+c9dfc673[ ]+mop\.r\.25[ ]+a2,t6
35+
[ ]+[0-9a-f]+:[ ]+c9e247f3[ ]+mop\.r\.26[ ]+a5,tp
36+
[ ]+[0-9a-f]+:[ ]+c9f4c973[ ]+mop\.r\.27[ ]+s2,s1
37+
[ ]+[0-9a-f]+:[ ]+cdc74af3[ ]+mop\.r\.28[ ]+s5,a4
38+
[ ]+[0-9a-f]+:[ ]+cdd9cc73[ ]+mop\.r\.29[ ]+s8,s3
39+
[ ]+[0-9a-f]+:[ ]+cdec4df3[ ]+mop\.r\.30[ ]+s11,s8
40+
[ ]+[0-9a-f]+:[ ]+cdfecf73[ ]+mop\.r\.31[ ]+t5,t4
41+
[ ]+[0-9a-f]+:[ ]+8324c473[ ]+mop\.rr\.0[ ]+s0,s1,s2
42+
[ ]+[0-9a-f]+:[ ]+873944f3[ ]+mop\.rr\.1[ ]+s1,s2,s3
43+
[ ]+[0-9a-f]+:[ ]+8b49c973[ ]+mop\.rr\.2[ ]+s2,s3,s4
44+
[ ]+[0-9a-f]+:[ ]+8f5a49f3[ ]+mop\.rr\.3[ ]+s3,s4,s5
45+
[ ]+[0-9a-f]+:[ ]+c36aca73[ ]+mop\.rr\.4[ ]+s4,s5,s6
46+
[ ]+[0-9a-f]+:[ ]+c77b4af3[ ]+mop\.rr\.5[ ]+s5,s6,s7
47+
[ ]+[0-9a-f]+:[ ]+cb8bcb73[ ]+mop\.rr\.6[ ]+s6,s7,s8
48+
[ ]+[0-9a-f]+:[ ]+cf9c4bf3[ ]+mop\.rr\.7[ ]+s7,s8,s9

‎gas/testsuite/gas/riscv/zimop.s‎

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
target:
2+
mop.r.0 x1, x2
3+
mop.r.1 x4, x7
4+
mop.r.2 x7, x12
5+
mop.r.3 x10, x17
6+
mop.r.4 x13, x22
7+
mop.r.5 x16, x27
8+
mop.r.6 x19, x0
9+
mop.r.7 x22, x5
10+
mop.r.8 x25, x10
11+
mop.r.9 x28, x15
12+
mop.r.10 x31, x20
13+
mop.r.11 x2, x25
14+
mop.r.12 x5, x30
15+
mop.r.13 x8, x3
16+
mop.r.14 x11, x8
17+
mop.r.15 x14, x13
18+
mop.r.16 x17, x18
19+
mop.r.17 x20, x23
20+
mop.r.18 x23, x28
21+
mop.r.19 x26, x1
22+
mop.r.20 x29, x6
23+
mop.r.21 x0, x11
24+
mop.r.22 x3, x16
25+
mop.r.23 x6, x21
26+
mop.r.24 x9, x26
27+
mop.r.25 x12, x31
28+
mop.r.26 x15, x4
29+
mop.r.27 x18, x9
30+
mop.r.28 x21, x14
31+
mop.r.29 x24, x19
32+
mop.r.30 x27, x24
33+
mop.r.31 x30, x29
34+
mop.rr.0 s0, s1, s2
35+
mop.rr.1 s1, s2, s3
36+
mop.rr.2 s2, s3, s4
37+
mop.rr.3 s3, s4, s5
38+
mop.rr.4 s4, s5, s6
39+
mop.rr.5 s5, s6, s7
40+
mop.rr.6 s6, s7, s8
41+
mop.rr.7 s7, s8, s9

‎include/opcode/riscv-opc.h‎

Lines changed: 122 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2315,6 +2315,87 @@
23152315
#define MASK_C_NTL_S1 0xffff
23162316
#define MATCH_C_NTL_ALL 0x9016
23172317
#define MASK_C_NTL_ALL 0xffff
2318+
/* Zimop "may be" operations. */
2319+
#define MATCH_MOP_R_0 0x81c04073
2320+
#define MASK_MOP_R_0 0xfff0707f
2321+
#define MATCH_MOP_R_1 0x81d04073
2322+
#define MASK_MOP_R_1 0xfff0707f
2323+
#define MATCH_MOP_R_2 0x81e04073
2324+
#define MASK_MOP_R_2 0xfff0707f
2325+
#define MATCH_MOP_R_3 0x81f04073
2326+
#define MASK_MOP_R_3 0xfff0707f
2327+
#define MATCH_MOP_R_4 0x85c04073
2328+
#define MASK_MOP_R_4 0xfff0707f
2329+
#define MATCH_MOP_R_5 0x85d04073
2330+
#define MASK_MOP_R_5 0xfff0707f
2331+
#define MATCH_MOP_R_6 0x85e04073
2332+
#define MASK_MOP_R_6 0xfff0707f
2333+
#define MATCH_MOP_R_7 0x85f04073
2334+
#define MASK_MOP_R_7 0xfff0707f
2335+
#define MATCH_MOP_R_8 0x89c04073
2336+
#define MASK_MOP_R_8 0xfff0707f
2337+
#define MATCH_MOP_R_9 0x89d04073
2338+
#define MASK_MOP_R_9 0xfff0707f
2339+
#define MATCH_MOP_R_10 0x89e04073
2340+
#define MASK_MOP_R_10 0xfff0707f
2341+
#define MATCH_MOP_R_11 0x89f04073
2342+
#define MASK_MOP_R_11 0xfff0707f
2343+
#define MATCH_MOP_R_12 0x8dc04073
2344+
#define MASK_MOP_R_12 0xfff0707f
2345+
#define MATCH_MOP_R_13 0x8dd04073
2346+
#define MASK_MOP_R_13 0xfff0707f
2347+
#define MATCH_MOP_R_14 0x8de04073
2348+
#define MASK_MOP_R_14 0xfff0707f
2349+
#define MATCH_MOP_R_15 0x8df04073
2350+
#define MASK_MOP_R_15 0xfff0707f
2351+
#define MATCH_MOP_R_16 0xc1c04073
2352+
#define MASK_MOP_R_16 0xfff0707f
2353+
#define MATCH_MOP_R_17 0xc1d04073
2354+
#define MASK_MOP_R_17 0xfff0707f
2355+
#define MATCH_MOP_R_18 0xc1e04073
2356+
#define MASK_MOP_R_18 0xfff0707f
2357+
#define MATCH_MOP_R_19 0xc1f04073
2358+
#define MASK_MOP_R_19 0xfff0707f
2359+
#define MATCH_MOP_R_20 0xc5c04073
2360+
#define MASK_MOP_R_20 0xfff0707f
2361+
#define MATCH_MOP_R_21 0xc5d04073
2362+
#define MASK_MOP_R_21 0xfff0707f
2363+
#define MATCH_MOP_R_22 0xc5e04073
2364+
#define MASK_MOP_R_22 0xfff0707f
2365+
#define MATCH_MOP_R_23 0xc5f04073
2366+
#define MASK_MOP_R_23 0xfff0707f
2367+
#define MATCH_MOP_R_24 0xc9c04073
2368+
#define MASK_MOP_R_24 0xfff0707f
2369+
#define MATCH_MOP_R_25 0xc9d04073
2370+
#define MASK_MOP_R_25 0xfff0707f
2371+
#define MATCH_MOP_R_26 0xc9e04073
2372+
#define MASK_MOP_R_26 0xfff0707f
2373+
#define MATCH_MOP_R_27 0xc9f04073
2374+
#define MASK_MOP_R_27 0xfff0707f
2375+
#define MATCH_MOP_R_28 0xcdc04073
2376+
#define MASK_MOP_R_28 0xfff0707f
2377+
#define MATCH_MOP_R_29 0xcdd04073
2378+
#define MASK_MOP_R_29 0xfff0707f
2379+
#define MATCH_MOP_R_30 0xcde04073
2380+
#define MASK_MOP_R_30 0xfff0707f
2381+
#define MATCH_MOP_R_31 0xcdf04073
2382+
#define MASK_MOP_R_31 0xfff0707f
2383+
#define MATCH_MOP_RR_0 0x82004073
2384+
#define MASK_MOP_RR_0 0xfe00707f
2385+
#define MATCH_MOP_RR_1 0x86004073
2386+
#define MASK_MOP_RR_1 0xfe00707f
2387+
#define MATCH_MOP_RR_2 0x8a004073
2388+
#define MASK_MOP_RR_2 0xfe00707f
2389+
#define MATCH_MOP_RR_3 0x8e004073
2390+
#define MASK_MOP_RR_3 0xfe00707f
2391+
#define MATCH_MOP_RR_4 0xc2004073
2392+
#define MASK_MOP_RR_4 0xfe00707f
2393+
#define MATCH_MOP_RR_5 0xc6004073
2394+
#define MASK_MOP_RR_5 0xfe00707f
2395+
#define MATCH_MOP_RR_6 0xca004073
2396+
#define MASK_MOP_RR_6 0xfe00707f
2397+
#define MATCH_MOP_RR_7 0xce004073
2398+
#define MASK_MOP_RR_7 0xfe00707f
23182399
/* Zawrs instructions. */
23192400
#define MATCH_WRS_NTO 0x00d00073
23202401
#define MASK_WRS_NTO 0xffffffff
@@ -3370,6 +3451,47 @@ DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1)
33703451
DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL)
33713452
DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1)
33723453
DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL)
3454+
/* Zimop "may be" operations. */
3455+
DECLARE_INSN(mop_r_0, MATCH_MOP_R_0, MASK_MOP_R_0)
3456+
DECLARE_INSN(mop_r_1, MATCH_MOP_R_1, MASK_MOP_R_1)
3457+
DECLARE_INSN(mop_r_2, MATCH_MOP_R_2, MASK_MOP_R_2)
3458+
DECLARE_INSN(mop_r_3, MATCH_MOP_R_3, MASK_MOP_R_3)
3459+
DECLARE_INSN(mop_r_4, MATCH_MOP_R_4, MASK_MOP_R_4)
3460+
DECLARE_INSN(mop_r_5, MATCH_MOP_R_5, MASK_MOP_R_5)
3461+
DECLARE_INSN(mop_r_6, MATCH_MOP_R_6, MASK_MOP_R_6)
3462+
DECLARE_INSN(mop_r_7, MATCH_MOP_R_7, MASK_MOP_R_7)
3463+
DECLARE_INSN(mop_r_8, MATCH_MOP_R_8, MASK_MOP_R_8)
3464+
DECLARE_INSN(mop_r_9, MATCH_MOP_R_9, MASK_MOP_R_9)
3465+
DECLARE_INSN(mop_r_10, MATCH_MOP_R_10, MASK_MOP_R_10)
3466+
DECLARE_INSN(mop_r_11, MATCH_MOP_R_11, MASK_MOP_R_11)
3467+
DECLARE_INSN(mop_r_12, MATCH_MOP_R_12, MASK_MOP_R_12)
3468+
DECLARE_INSN(mop_r_13, MATCH_MOP_R_13, MASK_MOP_R_13)
3469+
DECLARE_INSN(mop_r_14, MATCH_MOP_R_14, MASK_MOP_R_14)
3470+
DECLARE_INSN(mop_r_15, MATCH_MOP_R_15, MASK_MOP_R_15)
3471+
DECLARE_INSN(mop_r_16, MATCH_MOP_R_16, MASK_MOP_R_16)
3472+
DECLARE_INSN(mop_r_17, MATCH_MOP_R_17, MASK_MOP_R_17)
3473+
DECLARE_INSN(mop_r_18, MATCH_MOP_R_18, MASK_MOP_R_18)
3474+
DECLARE_INSN(mop_r_19, MATCH_MOP_R_19, MASK_MOP_R_19)
3475+
DECLARE_INSN(mop_r_20, MATCH_MOP_R_20, MASK_MOP_R_20)
3476+
DECLARE_INSN(mop_r_21, MATCH_MOP_R_21, MASK_MOP_R_21)
3477+
DECLARE_INSN(mop_r_22, MATCH_MOP_R_22, MASK_MOP_R_22)
3478+
DECLARE_INSN(mop_r_23, MATCH_MOP_R_23, MASK_MOP_R_23)
3479+
DECLARE_INSN(mop_r_24, MATCH_MOP_R_24, MASK_MOP_R_24)
3480+
DECLARE_INSN(mop_r_25, MATCH_MOP_R_25, MASK_MOP_R_25)
3481+
DECLARE_INSN(mop_r_26, MATCH_MOP_R_26, MASK_MOP_R_26)
3482+
DECLARE_INSN(mop_r_27, MATCH_MOP_R_27, MASK_MOP_R_27)
3483+
DECLARE_INSN(mop_r_28, MATCH_MOP_R_28, MASK_MOP_R_28)
3484+
DECLARE_INSN(mop_r_29, MATCH_MOP_R_29, MASK_MOP_R_29)
3485+
DECLARE_INSN(mop_r_30, MATCH_MOP_R_30, MASK_MOP_R_30)
3486+
DECLARE_INSN(mop_r_31, MATCH_MOP_R_31, MASK_MOP_R_31)
3487+
DECLARE_INSN(mop_rr_0, MATCH_MOP_RR_0, MASK_MOP_RR_0)
3488+
DECLARE_INSN(mop_rr_1, MATCH_MOP_RR_1, MASK_MOP_RR_1)
3489+
DECLARE_INSN(mop_rr_2, MATCH_MOP_RR_2, MASK_MOP_RR_2)
3490+
DECLARE_INSN(mop_rr_3, MATCH_MOP_RR_3, MASK_MOP_RR_3)
3491+
DECLARE_INSN(mop_rr_4, MATCH_MOP_RR_4, MASK_MOP_RR_4)
3492+
DECLARE_INSN(mop_rr_5, MATCH_MOP_RR_5, MASK_MOP_RR_5)
3493+
DECLARE_INSN(mop_rr_6, MATCH_MOP_RR_6, MASK_MOP_RR_6)
3494+
DECLARE_INSN(mop_rr_7, MATCH_MOP_RR_7, MASK_MOP_RR_7)
33733495
/* Zawrs instructions. */
33743496
DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO)
33753497
DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO)

‎include/opcode/riscv.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -395,6 +395,7 @@ enum riscv_insn_class
395395
INSN_CLASS_ZIHINTNTL,
396396
INSN_CLASS_ZIHINTNTL_AND_C,
397397
INSN_CLASS_ZIHINTPAUSE,
398+
INSN_CLASS_ZIMOP,
398399
INSN_CLASS_ZMMUL,
399400
INSN_CLASS_ZAWRS,
400401
INSN_CLASS_F_INX,

‎opcodes/riscv-opc.c‎

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1979,6 +1979,48 @@ const struct riscv_opcode riscv_opcodes[] =
19791979
{"c.zext.b", 0, INSN_CLASS_ZCB, "Cs", MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, 0 },
19801980
{"c.sext.w", 64, INSN_CLASS_ZCB, "d", MATCH_C_ADDIW, MASK_C_ADDIW|MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS },
19811981

1982+
/* Zimop "may be" operations. */
1983+
{"mop.r.0", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_0, MASK_MOP_R_0, match_opcode, 0 },
1984+
{"mop.r.1", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_1, MASK_MOP_R_1, match_opcode, 0 },
1985+
{"mop.r.2", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_2, MASK_MOP_R_2, match_opcode, 0 },
1986+
{"mop.r.3", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_3, MASK_MOP_R_3, match_opcode, 0 },
1987+
{"mop.r.4", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_4, MASK_MOP_R_4, match_opcode, 0 },
1988+
{"mop.r.5", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_5, MASK_MOP_R_5, match_opcode, 0 },
1989+
{"mop.r.6", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_6, MASK_MOP_R_6, match_opcode, 0 },
1990+
{"mop.r.7", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_7, MASK_MOP_R_7, match_opcode, 0 },
1991+
{"mop.r.8", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_8, MASK_MOP_R_8, match_opcode, 0 },
1992+
{"mop.r.9", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_9, MASK_MOP_R_9, match_opcode, 0 },
1993+
{"mop.r.10", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_10, MASK_MOP_R_10, match_opcode, 0 },
1994+
{"mop.r.11", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_11, MASK_MOP_R_11, match_opcode, 0 },
1995+
{"mop.r.12", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_12, MASK_MOP_R_12, match_opcode, 0 },
1996+
{"mop.r.13", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_13, MASK_MOP_R_13, match_opcode, 0 },
1997+
{"mop.r.14", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_14, MASK_MOP_R_14, match_opcode, 0 },
1998+
{"mop.r.15", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_15, MASK_MOP_R_15, match_opcode, 0 },
1999+
{"mop.r.16", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_16, MASK_MOP_R_16, match_opcode, 0 },
2000+
{"mop.r.17", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_17, MASK_MOP_R_17, match_opcode, 0 },
2001+
{"mop.r.18", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_18, MASK_MOP_R_18, match_opcode, 0 },
2002+
{"mop.r.19", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_19, MASK_MOP_R_19, match_opcode, 0 },
2003+
{"mop.r.20", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_20, MASK_MOP_R_20, match_opcode, 0 },
2004+
{"mop.r.21", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_21, MASK_MOP_R_21, match_opcode, 0 },
2005+
{"mop.r.22", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_22, MASK_MOP_R_22, match_opcode, 0 },
2006+
{"mop.r.23", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_23, MASK_MOP_R_23, match_opcode, 0 },
2007+
{"mop.r.24", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_24, MASK_MOP_R_24, match_opcode, 0 },
2008+
{"mop.r.25", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_25, MASK_MOP_R_25, match_opcode, 0 },
2009+
{"mop.r.26", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_26, MASK_MOP_R_26, match_opcode, 0 },
2010+
{"mop.r.27", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_27, MASK_MOP_R_27, match_opcode, 0 },
2011+
{"mop.r.28", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_28, MASK_MOP_R_28, match_opcode, 0 },
2012+
{"mop.r.29", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_29, MASK_MOP_R_29, match_opcode, 0 },
2013+
{"mop.r.30", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_30, MASK_MOP_R_30, match_opcode, 0 },
2014+
{"mop.r.31", 0, INSN_CLASS_ZIMOP, "d,s", MATCH_MOP_R_31, MASK_MOP_R_31, match_opcode, 0 },
2015+
{"mop.rr.0", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_0, MASK_MOP_RR_0, match_opcode, 0 },
2016+
{"mop.rr.1", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_1, MASK_MOP_RR_1, match_opcode, 0 },
2017+
{"mop.rr.2", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_2, MASK_MOP_RR_2, match_opcode, 0 },
2018+
{"mop.rr.3", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_3, MASK_MOP_RR_3, match_opcode, 0 },
2019+
{"mop.rr.4", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_4, MASK_MOP_RR_4, match_opcode, 0 },
2020+
{"mop.rr.5", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_5, MASK_MOP_RR_5, match_opcode, 0 },
2021+
{"mop.rr.6", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_6, MASK_MOP_RR_6, match_opcode, 0 },
2022+
{"mop.rr.7", 0, INSN_CLASS_ZIMOP, "d,s,t", MATCH_MOP_RR_7, MASK_MOP_RR_7, match_opcode, 0 },
2023+
19822024
/* Supervisor instructions. */
19832025
{"csrr", 0, INSN_CLASS_ZICSR, "d,E", MATCH_CSRRS, MASK_CSRRS|MASK_RS1, match_opcode, INSN_ALIAS },
19842026
{"csrwi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS },

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