RISC-V: Imply 'Zicsr' from 'Zve32x'

Further clarification is made so that 'Zve32x' implies 'Zicsr' (the same
implication is already implemented in LLVM).

See related issue (the author raised) on the vector specification:
<riscvarchive/riscv-v-spec#908>
and its resolution:
<riscvarchive/riscv-v-spec#909>

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_implicit_subsets): Add 'Zve32x' -> 'Zicsr'.

Author: a4lg

bfd/elfxx-riscv.c

@@ -1121,6 +1121,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zve64x", "zve32x",	check_implicit_always},
   {"zve64x", "zvl64b",	check_implicit_always},
   {"zve32x", "zvl32b",	check_implicit_always},
+  {"zve32x", "zicsr",	check_implicit_always},
   {"zvl65536b", "zvl32768b",	check_implicit_always},
   {"zvl32768b", "zvl16384b",	check_implicit_always},
   {"zvl16384b", "zvl8192b",	check_implicit_always},