RISC-V: Reorganize invalid rounding mode test

a4lg · a4lg · commit f673b357d441 · 2023-09-07T09:35:10.000Z
This commit reorganizes and adds testcases to
invalid rounding mode operand test.

gas/ChangeLog:

	* testsuite/gas/riscv/rounding-fail.s: Enhance test cases.
	* testsuite/gas/riscv/rounding-fail.l: Likewise.
diff --git a/gas/testsuite/gas/riscv/rounding-fail.l b/gas/testsuite/gas/riscv/rounding-fail.l
@@ -1,3 +1,5 @@
 .*: Assembler messages:
 .*: Error: illegal operands `fadd.s fa1,fa1,fa1,'
 .*: Error: illegal operands `fadd.d fa1,fa1,fa1,'
+.*: Error: illegal operands `fadd.s fa1,fa1,fa1,unknown'
+.*: Error: illegal operands `fadd.d fa1,fa1,fa1,unknown'
diff --git a/gas/testsuite/gas/riscv/rounding-fail.s b/gas/testsuite/gas/riscv/rounding-fail.s
@@ -1,3 +1,7 @@
 target:
+	# Empty rounding mode
 	fadd.s fa1,fa1,fa1,
 	fadd.d fa1,fa1,fa1,
+	# Invalid rounding mode
+	fadd.s fa1,fa1,fa1,unknown
+	fadd.d fa1,fa1,fa1,unknown
