@@ -3841,9 +3841,13 @@ entry:
38413841define i32 @src_and_eq_C_or_xororC (i32 %x , i32 %y , i32 %c ) {
38423842; CHECK-LABEL: @src_and_eq_C_or_xororC(
38433843; CHECK-NEXT: entry:
3844- ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
3845- ; CHECK-NEXT: [[OR1:%.*]] = or i32 [[XOR]], [[C:%.*]]
3846- ; CHECK-NEXT: ret i32 [[OR1]]
3844+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3845+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3846+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3847+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3848+ ; CHECK-NEXT: [[OR1:%.*]] = or i32 [[XOR]], [[C]]
3849+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[OR1]]
3850+ ; CHECK-NEXT: ret i32 [[COND]]
38473851;
38483852entry:
38493853 %and = and i32 %y , %x
@@ -3858,9 +3862,13 @@ entry:
38583862define i32 @src_and_eq_C_or_xorxorC (i32 %x , i32 %y , i32 %c ) {
38593863; CHECK-LABEL: @src_and_eq_C_or_xorxorC(
38603864; CHECK-NEXT: entry:
3861- ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
3862- ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C:%.*]]
3863- ; CHECK-NEXT: ret i32 [[XOR1]]
3865+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3866+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3867+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3868+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3869+ ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C]]
3870+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[XOR1]]
3871+ ; CHECK-NEXT: ret i32 [[COND]]
38643872;
38653873entry:
38663874 %and = and i32 %y , %x
@@ -3875,10 +3883,14 @@ entry:
38753883define i32 @src_and_eq_C_xor_OrAndNotC (i32 %x , i32 %y , i32 %c ) {
38763884; CHECK-LABEL: @src_and_eq_C_xor_OrAndNotC(
38773885; CHECK-NEXT: entry:
3878- ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3879- ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C:%.*]], -1
3886+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3887+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3888+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3889+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3890+ ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C]], -1
38803891; CHECK-NEXT: [[AND1:%.*]] = and i32 [[OR]], [[NOT]]
3881- ; CHECK-NEXT: ret i32 [[AND1]]
3892+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[AND1]]
3893+ ; CHECK-NEXT: ret i32 [[COND]]
38823894;
38833895entry:
38843896 %and = and i32 %y , %x
@@ -3917,9 +3929,13 @@ entry:
39173929define i32 @src_and_eq_C_xor_orxorC (i32 %x , i32 %y , i32 %c ) {
39183930; CHECK-LABEL: @src_and_eq_C_xor_orxorC(
39193931; CHECK-NEXT: entry:
3920- ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3921- ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C:%.*]]
3922- ; CHECK-NEXT: ret i32 [[XOR1]]
3932+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3933+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3934+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3935+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3936+ ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C]]
3937+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[XOR1]]
3938+ ; CHECK-NEXT: ret i32 [[COND]]
39233939;
39243940entry:
39253941 %and = and i32 %y , %x
@@ -3968,9 +3984,13 @@ entry:
39683984define i32 @src_or_eq_neg1_and_xor (i32 %x , i32 %y ) {
39693985; CHECK-LABEL: @src_or_eq_neg1_and_xor(
39703986; CHECK-NEXT: entry:
3971- ; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
3987+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3988+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], -1
3989+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
3990+ ; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X]], [[Y]]
39723991; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[TMP0]], -1
3973- ; CHECK-NEXT: ret i32 [[NOT]]
3992+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[NOT]]
3993+ ; CHECK-NEXT: ret i32 [[COND]]
39743994;
39753995entry:
39763996 %or = or i32 %y , %x
@@ -3985,9 +4005,13 @@ entry:
39854005define i32 @src_or_eq_neg1_xor_and (i32 %x , i32 %y ) {
39864006; CHECK-LABEL: @src_or_eq_neg1_xor_and(
39874007; CHECK-NEXT: entry:
3988- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4008+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4009+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], -1
4010+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4011+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
39894012; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[AND]], -1
3990- ; CHECK-NEXT: ret i32 [[NOT]]
4013+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[NOT]]
4014+ ; CHECK-NEXT: ret i32 [[COND]]
39914015;
39924016entry:
39934017 %or = or i32 %y , %x
@@ -4002,9 +4026,13 @@ entry:
40024026define i32 @src_or_eq_C_and_xorC (i32 %x , i32 %y , i32 %c ) {
40034027; CHECK-LABEL: @src_or_eq_C_and_xorC(
40044028; CHECK-NEXT: entry:
4005- ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4006- ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C:%.*]]
4007- ; CHECK-NEXT: ret i32 [[XOR1]]
4029+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4030+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4031+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4032+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4033+ ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C]]
4034+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[XOR1]]
4035+ ; CHECK-NEXT: ret i32 [[COND]]
40084036;
40094037entry:
40104038 %or = or i32 %y , %x
@@ -4019,10 +4047,14 @@ entry:
40194047define i32 @src_or_eq_C_and_andnotxorC (i32 %x , i32 %y , i32 %c ) {
40204048; CHECK-LABEL: @src_or_eq_C_and_andnotxorC(
40214049; CHECK-NEXT: entry:
4022- ; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
4050+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4051+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4052+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4053+ ; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X]], [[Y]]
40234054; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[TMP0]], -1
4024- ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C:%.*]], [[NOT]]
4025- ; CHECK-NEXT: ret i32 [[AND1]]
4055+ ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C]], [[NOT]]
4056+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[AND1]]
4057+ ; CHECK-NEXT: ret i32 [[COND]]
40264058;
40274059entry:
40284060 %or = or i32 %y , %x
@@ -4038,9 +4070,13 @@ entry:
40384070define i32 @src_or_eq_C_xor_xorandC (i32 %x , i32 %y , i32 %c ) {
40394071; CHECK-LABEL: @src_or_eq_C_xor_xorandC(
40404072; CHECK-NEXT: entry:
4041- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4042- ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C:%.*]]
4043- ; CHECK-NEXT: ret i32 [[XOR1]]
4073+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4074+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4075+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4076+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4077+ ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C]]
4078+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[XOR1]]
4079+ ; CHECK-NEXT: ret i32 [[COND]]
40444080;
40454081entry:
40464082 %or = or i32 %y , %x
@@ -4055,10 +4091,14 @@ entry:
40554091define i32 @src_or_eq_C_xor_andnotandC (i32 %x , i32 %y , i32 %c ) {
40564092; CHECK-LABEL: @src_or_eq_C_xor_andnotandC(
40574093; CHECK-NEXT: entry:
4058- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4094+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4095+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4096+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4097+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
40594098; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[AND]], -1
4060- ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C:%.*]], [[NOT]]
4061- ; CHECK-NEXT: ret i32 [[AND1]]
4099+ ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C]], [[NOT]]
4100+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[AND1]]
4101+ ; CHECK-NEXT: ret i32 [[COND]]
40624102;
40634103entry:
40644104 %or = or i32 %y , %x
@@ -4076,9 +4116,13 @@ entry:
40764116define i32 @src_xor_eq_neg1_and (i32 %x , i32 %y ) {
40774117; CHECK-LABEL: @src_xor_eq_neg1_and(
40784118; CHECK-NEXT: entry:
4079- ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4119+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4120+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], -1
4121+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4122+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
40804123; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[OR]], -1
4081- ; CHECK-NEXT: ret i32 [[NOT]]
4124+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[NOT]]
4125+ ; CHECK-NEXT: ret i32 [[COND]]
40824126;
40834127entry:
40844128 %xor = xor i32 %y , %x
@@ -4111,9 +4155,13 @@ entry:
41114155define i32 @src_xor_eq_C_and_xororC (i32 %x , i32 %y , i32 %c ) {
41124156; CHECK-LABEL: @src_xor_eq_C_and_xororC(
41134157; CHECK-NEXT: entry:
4114- ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4115- ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C:%.*]]
4116- ; CHECK-NEXT: ret i32 [[XOR1]]
4158+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4159+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4160+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4161+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4162+ ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C]]
4163+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[XOR1]]
4164+ ; CHECK-NEXT: ret i32 [[COND]]
41174165;
41184166entry:
41194167 %xor = xor i32 %y , %x
@@ -4128,10 +4176,14 @@ entry:
41284176define i32 @src_xor_eq_C_and_andornotC (i32 %x , i32 %y , i32 %c ) {
41294177; CHECK-LABEL: @src_xor_eq_C_and_andornotC(
41304178; CHECK-NEXT: entry:
4131- ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4132- ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C:%.*]], -1
4179+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4180+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4181+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4182+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4183+ ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C]], -1
41334184; CHECK-NEXT: [[AND1:%.*]] = and i32 [[OR]], [[NOT]]
4134- ; CHECK-NEXT: ret i32 [[AND1]]
4185+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[AND1]]
4186+ ; CHECK-NEXT: ret i32 [[COND]]
41354187;
41364188entry:
41374189 %xor = xor i32 %y , %x
@@ -4147,9 +4199,13 @@ entry:
41474199define i32 @src_xor_eq_C_or_xorandC (i32 %x , i32 %y , i32 %c ) {
41484200; CHECK-LABEL: @src_xor_eq_C_or_xorandC(
41494201; CHECK-NEXT: entry:
4150- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4151- ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C:%.*]]
4152- ; CHECK-NEXT: ret i32 [[XOR1]]
4202+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4203+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4204+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4205+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4206+ ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C]]
4207+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[XOR1]]
4208+ ; CHECK-NEXT: ret i32 [[COND]]
41534209;
41544210entry:
41554211 %xor = xor i32 %y , %x
@@ -4164,9 +4220,13 @@ entry:
41644220define i32 @src_xor_eq_C_or_orandC (i32 %x , i32 %y , i32 %c ) {
41654221; CHECK-LABEL: @src_xor_eq_C_or_orandC(
41664222; CHECK-NEXT: entry:
4167- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4168- ; CHECK-NEXT: [[OR1:%.*]] = or i32 [[AND]], [[C:%.*]]
4169- ; CHECK-NEXT: ret i32 [[OR1]]
4223+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4224+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4225+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4226+ ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4227+ ; CHECK-NEXT: [[OR1:%.*]] = or i32 [[AND]], [[C]]
4228+ ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[OR1]]
4229+ ; CHECK-NEXT: ret i32 [[COND]]
41704230;
41714231entry:
41724232 %xor = xor i32 %y , %x
0 commit comments