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[AMDGPU][NFC] Refactor FLAT_Global_* pseudos. (llvm#120244)
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llvm/lib/Target/AMDGPU/FLATInstructions.td

Lines changed: 68 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -228,15 +228,14 @@ class GlobalSaddrTable <bit is_saddr, string Name = ""> {
228228
// saddr is 32-bit (which isn't handled here yet).
229229
class FLAT_Load_Pseudo<
230230
string opName, RegisterOperand vdata_op, bit HasTiedOutput = 0,
231-
bit HasSaddr = 0, bit EnableSaddr = 0>
231+
bit HasSaddr = 0, bit EnableSaddr = 0,
232+
RegisterClass VaddrRC = !if(EnableSaddr, VGPR_32, VReg_64)>
232233
: FLAT_Pseudo<opName, (outs), (ins), ""> {
233234

234235
let OutOperandList = (outs vdata_op:$vdst);
235236
let InOperandList = !con(
236-
!if(EnableSaddr,
237-
(ins SReg_64_XEXEC_XNULL:$saddr, VGPR_32:$vaddr),
238-
(ins VReg_64:$vaddr)),
239-
(ins flat_offset:$offset),
237+
!if(EnableSaddr, (ins SReg_64_XEXEC_XNULL:$saddr), (ins)),
238+
(ins VaddrRC:$vaddr, flat_offset:$offset),
240239
// FIXME: Operands with default values do not work with following
241240
// non-optional operands.
242241
!if(HasTiedOutput, (ins CPol:$cpol, vdata_op:$vdst_in),
@@ -268,15 +267,13 @@ multiclass FLAT_Flat_Load_Pseudo_t16<string opName> {
268267
}
269268

270269
class FLAT_Store_Pseudo <string opName, RegisterOperand vdataClass,
271-
bit HasSaddr = 0, bit EnableSaddr = 0> : FLAT_Pseudo<
272-
opName,
273-
(outs),
274-
!con(
275-
!if(EnableSaddr,
276-
(ins VGPR_32:$vaddr, vdataClass:$vdata, SReg_64_XEXEC_XNULL:$saddr),
277-
(ins VReg_64:$vaddr, vdataClass:$vdata)),
278-
(ins flat_offset:$offset, CPol_0:$cpol)),
279-
" $vaddr, $vdata"#!if(HasSaddr, !if(EnableSaddr, ", $saddr", ", off"), "")#"$offset$cpol"> {
270+
bit HasSaddr = 0, bit EnableSaddr = 0,
271+
RegisterClass VaddrRC = !if(EnableSaddr, VGPR_32, VReg_64)> : FLAT_Pseudo<opName, (outs), (ins), ""> {
272+
let InOperandList = !con(
273+
(ins VaddrRC:$vaddr, vdataClass:$vdata),
274+
!if(EnableSaddr, (ins SReg_64_XEXEC_XNULL:$saddr), (ins)),
275+
(ins flat_offset:$offset, CPol_0:$cpol));
276+
let AsmOperands = " $vaddr, $vdata"#!if(HasSaddr, !if(EnableSaddr, ", $saddr", ", off"), "")#"$offset$cpol";
280277
let mayLoad = 0;
281278
let mayStore = 1;
282279
let has_vdst = 0;
@@ -833,99 +830,83 @@ multiclass FLAT_Atomic_Pseudo<
833830
defm "" : FLAT_Atomic_Pseudo_RTN<opName, vdst_op, vt, data_vt, data_op>;
834831
}
835832

836-
multiclass FLAT_Global_Atomic_Pseudo_NO_RTN<
833+
class FLAT_Global_Atomic_Pseudo_NO_RTN<
837834
string opName,
838835
RegisterOperand vdst_op,
839836
ValueType vt,
840837
ValueType data_vt = vt,
841-
RegisterOperand data_op = vdst_op> {
842-
843-
let is_flat_global = 1 in {
844-
def "" : FLAT_AtomicNoRet_Pseudo <opName,
845-
(outs),
846-
(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_0:$cpol),
847-
" $vaddr, $vdata, off$offset$cpol">,
848-
GlobalSaddrTable<0, opName> {
849-
let has_saddr = 1;
850-
let FPAtomic = data_vt.isFP;
851-
}
852-
853-
def _SADDR : FLAT_AtomicNoRet_Pseudo <opName,
854-
(outs),
855-
(ins VGPR_32:$vaddr, data_op:$vdata, SReg_64_XEXEC_XNULL:$saddr, flat_offset:$offset, CPol_0:$cpol),
856-
" $vaddr, $vdata, $saddr$offset$cpol">,
857-
GlobalSaddrTable<1, opName> {
858-
let has_saddr = 1;
859-
let enabled_saddr = 1;
860-
let FPAtomic = data_vt.isFP;
861-
}
862-
}
838+
RegisterOperand data_op = vdst_op,
839+
bit EnableSaddr = false,
840+
RegisterClass VaddrRC = !if(EnableSaddr, VGPR_32, VReg_64)>
841+
: FLAT_AtomicNoRet_Pseudo<opName, (outs), (ins), "">, GlobalSaddrTable<EnableSaddr, opName> {
842+
let InOperandList = !con(
843+
(ins VaddrRC:$vaddr, data_op:$vdata),
844+
!if(EnableSaddr, (ins SReg_64_XEXEC_XNULL:$saddr), (ins)),
845+
(ins flat_offset:$offset, CPol_0:$cpol));
846+
let AsmOperands = " $vaddr, $vdata, "#!if(EnableSaddr, "$saddr", "off")#"$offset$cpol";
847+
let has_saddr = 1;
848+
let enabled_saddr = EnableSaddr;
849+
let FPAtomic = data_vt.isFP;
850+
let is_flat_global = 1;
863851
}
864852

865-
multiclass FLAT_Global_Atomic_Pseudo_RTN<
866-
string opName,
853+
multiclass FLAT_Global_Atomic_Pseudo_Helper_NO_RTN<string opName,
867854
RegisterOperand vdst_op,
868855
ValueType vt,
869856
ValueType data_vt = vt,
870857
RegisterOperand data_op = vdst_op> {
858+
def "" : FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_op, vt, data_vt, data_op, 0>;
859+
def _SADDR : FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_op, vt, data_vt, data_op, 1>;
860+
}
871861

872-
defvar vdst_op_vgpr = getEquivalentVGPROperand<vdst_op>.ret;
873-
defvar data_op_vgpr = getEquivalentVGPROperand<data_op>.ret;
874-
875-
let is_flat_global = 1 in {
876-
def _RTN : FLAT_AtomicRet_Pseudo <opName,
877-
(outs vdst_op_vgpr:$vdst),
878-
(ins VReg_64:$vaddr, data_op_vgpr:$vdata, flat_offset:$offset, CPol_GLC1:$cpol),
879-
" $vdst, $vaddr, $vdata, off$offset$cpol">,
880-
GlobalSaddrTable<0, opName#"_rtn"> {
881-
let has_saddr = 1;
882-
let FPAtomic = data_vt.isFP;
883-
}
862+
class FLAT_Global_Atomic_Pseudo_RTN<
863+
string opName,
864+
RegisterOperand vdst_op,
865+
ValueType vt,
866+
ValueType data_vt = vt,
867+
RegisterOperand data_op = vdst_op,
868+
bit EnableSaddr = false,
869+
bit IsVGPR = false,
870+
RegisterClass VaddrRC = !if(EnableSaddr, VGPR_32, VReg_64)>
871+
: FLAT_AtomicRet_Pseudo<opName, (outs), (ins), "">, GlobalSaddrTable<EnableSaddr, opName#"_rtn"#!if(IsVGPR, "", "_agpr")> {
884872

885-
def _SADDR_RTN : FLAT_AtomicRet_Pseudo <opName,
886-
(outs vdst_op_vgpr:$vdst),
887-
(ins VGPR_32:$vaddr, data_op_vgpr:$vdata, SReg_64_XEXEC_XNULL:$saddr, flat_offset:$offset, CPol_GLC1:$cpol),
888-
" $vdst, $vaddr, $vdata, $saddr$offset$cpol">,
889-
GlobalSaddrTable<1, opName#"_rtn"> {
890-
let has_saddr = 1;
891-
let enabled_saddr = 1;
892-
let FPAtomic = data_vt.isFP;
893-
}
873+
defvar vdst_rc= !if(IsVGPR, getEquivalentVGPROperand<vdst_op>.ret, getEquivalentAGPROperand<vdst_op>.ret);
874+
defvar data_rc = !if(IsVGPR, getEquivalentVGPROperand<data_op>.ret, getEquivalentAGPROperand<data_op>.ret);
894875

895-
defvar vdst_op_agpr = getEquivalentAGPROperand<vdst_op>.ret;
896-
defvar data_op_agpr = getEquivalentAGPROperand<data_op>.ret;
876+
let OutOperandList = (outs vdst_rc:$vdst);
877+
let InOperandList = !con(
878+
(ins VaddrRC:$vaddr, data_rc:$vdata),
879+
!if(EnableSaddr, (ins SReg_64_XEXEC_XNULL:$saddr), (ins)),
880+
(ins flat_offset:$offset, CPol_GLC1:$cpol));
881+
let AsmOperands = " $vdst, $vaddr, $vdata, "#!if(EnableSaddr, "$saddr", "off")#"$offset$cpol";
882+
let has_saddr = 1;
883+
let enabled_saddr = EnableSaddr;
884+
let FPAtomic = data_vt.isFP;
885+
let is_flat_global = 1;
886+
}
897887

888+
multiclass FLAT_Global_Atomic_Pseudo_Helper_RTN<string opName,
889+
RegisterOperand vdst_op,
890+
ValueType vt,
891+
ValueType data_vt = vt,
892+
RegisterOperand data_op = vdst_op> {
893+
def _RTN : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_op, vt, data_vt, data_op, 0, 1>;
894+
def _SADDR_RTN : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_op, vt, data_vt, data_op, 1, 1>;
898895
let SubtargetPredicate = isGFX90APlus in {
899-
def _RTN_agpr : FLAT_AtomicRet_Pseudo <opName,
900-
(outs vdst_op_agpr:$vdst),
901-
(ins VReg_64:$vaddr, data_op_agpr:$vdata, flat_offset:$offset, CPol_GLC1:$cpol),
902-
" $vdst, $vaddr, $vdata, off$offset$cpol">,
903-
GlobalSaddrTable<0, opName#"_rtn_agpr"> {
904-
let has_saddr = 1;
905-
let FPAtomic = data_vt.isFP;
906-
}
907-
908-
def _SADDR_RTN_agpr : FLAT_AtomicRet_Pseudo <opName,
909-
(outs vdst_op_agpr:$vdst),
910-
(ins VGPR_32:$vaddr, data_op_agpr:$vdata, SReg_64_XEXEC_XNULL:$saddr, flat_offset:$offset, CPol_GLC1:$cpol),
911-
" $vdst, $vaddr, $vdata, $saddr$offset$cpol">,
912-
GlobalSaddrTable<1, opName#"_rtn_agpr"> {
913-
let has_saddr = 1;
914-
let enabled_saddr = 1;
915-
let FPAtomic = data_vt.isFP;
916-
}
917-
}
896+
def _RTN_agpr : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_op, vt, data_vt, data_op, 0, 0>;
897+
def _SADDR_RTN_agpr : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_op, vt, data_vt, data_op, 1, 0>;
918898
}
919899
}
920900

901+
921902
multiclass FLAT_Global_Atomic_Pseudo<
922903
string opName,
923904
RegisterOperand vdst_rc,
924905
ValueType vt,
925906
ValueType data_vt = vt,
926907
RegisterOperand data_rc = vdst_rc> {
927-
defm "" : FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
928-
defm "" : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
908+
defm "" : FLAT_Global_Atomic_Pseudo_Helper_NO_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
909+
defm "" : FLAT_Global_Atomic_Pseudo_Helper_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
929910
}
930911

931912
//===----------------------------------------------------------------------===//
@@ -1356,19 +1337,19 @@ let SubtargetPredicate = isGFX10Plus in {
13561337
} // End SubtargetPredicate = isGFX10Plus
13571338

13581339
let SubtargetPredicate = HasAtomicFaddNoRtnInsts in
1359-
defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Global_Atomic_Pseudo_NO_RTN <
1340+
defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Global_Atomic_Pseudo_Helper_NO_RTN <
13601341
"global_atomic_add_f32", AVLdSt_32, f32
13611342
>;
13621343
let SubtargetPredicate = HasAtomicBufferGlobalPkAddF16NoRtnInsts in
1363-
defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Global_Atomic_Pseudo_NO_RTN <
1344+
defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Global_Atomic_Pseudo_Helper_NO_RTN <
13641345
"global_atomic_pk_add_f16", AVLdSt_32, v2f16
13651346
>;
13661347
let SubtargetPredicate = HasAtomicFaddRtnInsts in
1367-
defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Global_Atomic_Pseudo_RTN <
1348+
defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Global_Atomic_Pseudo_Helper_RTN <
13681349
"global_atomic_add_f32", AVLdSt_32, f32
13691350
>;
13701351
let SubtargetPredicate = HasAtomicBufferGlobalPkAddF16Insts in
1371-
defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Global_Atomic_Pseudo_RTN <
1352+
defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Global_Atomic_Pseudo_Helper_RTN <
13721353
"global_atomic_pk_add_f16", AVLdSt_32, v2f16
13731354
>;
13741355

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