@@ -2093,6 +2093,7 @@ private void comsub(ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
20932093 regm_t regm,emask;
20942094 reg_t reg;
20952095 uint byte_,sz;
2096+ const AArch64 = cgstate.AArch64;
20962097
20972098 // printf("comsub(e = %p, pretregs = %s)\n",e,regm_str(pretregs));
20982099 // elem_debug(e);
@@ -2114,16 +2115,18 @@ private void comsub(ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
21142115 * have the right contents.
21152116 */
21162117 emask = 0 ;
2117- for ( uint i = 0 ; i < cgstate.regcon.cse.value.length; i ++ )
2118+ foreach (i, ref v; cgstate.regcon.cse.value[] )
21182119 {
2119- // dbg_printf ("regcon.cse.value[%d] = %p\n",i,cgstate.regcon.cse.value[i] );
2120- if (cgstate.regcon.cse.value[i] == e) // if contents are right
2121- emask |= mask(i); // turn on bit for reg
2120+ // printf ("regcon.cse.value[%d] = %p\n",cast(int)i,v );
2121+ if (v == e) // if contents match
2122+ emask |= mask(cast ( uint ) i); // turn on bit for reg
21222123 }
21232124 emask &= cgstate.regcon.cse.mval; // make sure all bits are valid
21242125
2125- if (emask & XMMREGS && pretregs == mPSW)
2126- { }
2126+ if (AArch64)
2127+ { }
2128+ else if (emask & XMMREGS && pretregs == mPSW)
2129+ { }
21272130 else if (tyxmmreg(e.Ety) && config.fpxmmregs)
21282131 {
21292132 if (pretregs & (mST0 | mST01))
@@ -2158,7 +2161,8 @@ private void comsub(ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
21582161 sz = _tysize[tym];
21592162 byte_ = sz == 1 ;
21602163
2161- if (sz <= REGSIZE || (tyxmmreg(tym) && config.fpxmmregs)) // if data will fit in one register
2164+ if (sz <= REGSIZE ||
2165+ (! AArch64 && tyxmmreg(tym) && config.fpxmmregs)) // if data will fit in one register
21622166 {
21632167 /* First see if it is already in a correct register */
21642168
@@ -2184,6 +2188,17 @@ private void comsub(ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
21842188
21852189 if (cse.flags & CSEsimple)
21862190 {
2191+ if (AArch64)
2192+ {
2193+ retregs = pretregs;
2194+ if (! (retregs & cgstate.allregs | INSTR .FLOATREGS ))
2195+ retregs = cgstate.allregs | INSTR .FLOATREGS ;
2196+ reg = allocreg(cdb,retregs,tym);
2197+ code* cr = &cse.csimple;
2198+ cr.reg = reg;
2199+ cdb.gen(cr);
2200+ goto L10 ;
2201+ }
21872202 retregs = pretregs;
21882203 if (byte_ && ! (retregs & BYTEREGS ))
21892204 retregs = BYTEREGS ;
@@ -2201,9 +2216,9 @@ private void comsub(ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
22012216 {
22022217 cgstate.reflocal = true ;
22032218 cse.flags |= CSEload;
2204- if (pretregs == mPSW) // if result in CCs only
2219+ if (pretregs == mPSW && ! AArch64 ) // if result in CCs only
22052220 {
2206- if (0 && config.fpxmmregs && (tyxmmreg(cse.e.Ety) || tyvector(cse.e.Ety))) // TODO AArch64
2221+ if (config.fpxmmregs && (tyxmmreg(cse.e.Ety) || tyvector(cse.e.Ety)))
22072222 {
22082223 retregs = XMMREGS ;
22092224 reg = allocreg(cdb,retregs,tym);
@@ -2221,7 +2236,7 @@ private void comsub(ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
22212236 else
22222237 {
22232238 retregs = pretregs;
2224- if (byte_ && ! (retregs & BYTEREGS ))
2239+ if (! AArch64 && byte_ && ! (retregs & BYTEREGS ))
22252240 retregs = BYTEREGS ;
22262241 reg = allocreg(cdb,retregs,tym);
22272242 gen_loadcse(cdb, cse.e.Ety, reg, cse.slot);
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