[AArch64] Fix CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll

The commit f513d16

    [AArch64][PAC] Emit LR auth-failure checks on tail-calls.

broke the CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll test.
Specifically, changes to llvm/lib/Target/AArch64/AArch64RegisterInfo.td
and llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp files made
the pre-RA machine scheduler ("machine-scheduler" pass) order a block of
register-to-register restores differently, that is further shuffled by
post-RA machine scheduler down the pipeline.

The particular ordering of register restore instructions seems
irrelevant to the call-translator-variadic-musttail.ll test, so just
regenerated the test with update_llc_test_checks.py.

Author: atrosinenko

llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll

@@ -71,16 +71,16 @@ define i32 @test_musttail_variadic_spill(i32 %arg0, ...) {
 ; CHECK-NEXT:    mov w0, w19
 ; CHECK-NEXT:    mov x1, x20
 ; CHECK-NEXT:    mov x2, x21
+; CHECK-NEXT:    ldp q1, q0, [sp, #96] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x3, x22
+; CHECK-NEXT:    ldp q3, q2, [sp, #64] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x4, x23
+; CHECK-NEXT:    ldp q5, q4, [sp, #32] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x5, x24
+; CHECK-NEXT:    ldp q7, q6, [sp] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x6, x25
 ; CHECK-NEXT:    mov x7, x26
 ; CHECK-NEXT:    mov x8, x27
-; CHECK-NEXT:    ldp q1, q0, [sp, #96] ; 32-byte Folded Reload
-; CHECK-NEXT:    ldp q3, q2, [sp, #64] ; 32-byte Folded Reload
-; CHECK-NEXT:    ldp q5, q4, [sp, #32] ; 32-byte Folded Reload
-; CHECK-NEXT:    ldp q7, q6, [sp] ; 32-byte Folded Reload
 ; CHECK-NEXT:    ldp x29, x30, [sp, #208] ; 16-byte Folded Reload
 ; CHECK-NEXT:    ldp x20, x19, [sp, #192] ; 16-byte Folded Reload
 ; CHECK-NEXT:    ldp x22, x21, [sp, #176] ; 16-byte Folded Reload
@@ -142,17 +142,17 @@ define void @f_thunk(ptr %this, ...) {
 ; CHECK-NEXT:    mov x9, x0
 ; CHECK-NEXT:    mov x0, x19
 ; CHECK-NEXT:    mov x1, x20
+; CHECK-NEXT:    ldp q1, q0, [sp, #96] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x2, x21
+; CHECK-NEXT:    ldp q3, q2, [sp, #64] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x3, x22
+; CHECK-NEXT:    ldp q5, q4, [sp, #32] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x4, x23
+; CHECK-NEXT:    ldp q7, q6, [sp] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x5, x24
 ; CHECK-NEXT:    mov x6, x25
 ; CHECK-NEXT:    mov x7, x26
-; CHECK-NEXT:    ldp q1, q0, [sp, #96] ; 32-byte Folded Reload
 ; CHECK-NEXT:    mov x8, x27
-; CHECK-NEXT:    ldp q3, q2, [sp, #64] ; 32-byte Folded Reload
-; CHECK-NEXT:    ldp q5, q4, [sp, #32] ; 32-byte Folded Reload
-; CHECK-NEXT:    ldp q7, q6, [sp] ; 32-byte Folded Reload
 ; CHECK-NEXT:    ldp x29, x30, [sp, #240] ; 16-byte Folded Reload
 ; CHECK-NEXT:    ldp x20, x19, [sp, #224] ; 16-byte Folded Reload
 ; CHECK-NEXT:    ldp x22, x21, [sp, #208] ; 16-byte Folded Reload