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lines changed Original file line number Diff line number Diff line change @@ -43,7 +43,7 @@ def __init__(
4343 self ._timeout = timeout
4444 self .rx_pio = None
4545 if rx :
46- if rts :
46+ if rts :
4747 # Fleshed-out 8n1 UART receiver with hardware flow control handling
4848 # framing errors and break conditions more gracefully.
4949 # Wait for the start bit whilst updating rts with the FIFO level
@@ -87,7 +87,7 @@ def __init__(
8787 auto_push = False ,
8888 push_threshold = self .bitcount ,
8989 first_out_pin = rts ,
90- mov_status_type = ' rxfifo' ,
90+ mov_status_type = " rxfifo" ,
9191 mov_status_n = 7 ,
9292 )
9393 else :
@@ -137,7 +137,7 @@ def __init__(
137137
138138 # Line by line explanation:
139139 # * Assert stop bit, or stall with line in idle state
140- # * Wait for CTS# before transmitting
140+ # * Wait for CTS# before transmitting
141141 # * Preload bit counter, assert start bit for 8 clocks
142142 # * This loop will run 8 times (8n1 UART)
143143 # * Shift 1 bit from OSR to the first OUT pin
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