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BiffoBear
committed
Setup socket registers.
1 parent 67c3763 commit 3586526

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adafruit_wiznet5k/adafruit_wiznet5k.py

Lines changed: 50 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -82,18 +82,37 @@
8282
_REG_RCR = {"w5100s": const(0x0019), "w5500": const(0x001B), "w6100": const(0x4204)}
8383
_REG_RTR = {"w5100s": const(0x0017), "w5500": const(0x0019), "w6100": const(0x4200)}
8484

85-
# Wiznet Socket Registers.
86-
_REG_SNMR = const(0x0000) # Socket n Mode
87-
_REG_SNCR = const(0x0001) # Socket n Command
88-
_REG_SNIR = const(0x0002) # Socket n Interrupt
89-
_REG_SNSR = const(0x0003) # Socket n Status
90-
_REG_SNPORT = const(0x0004) # Socket n Source Port
91-
_REG_SNDIPR = const(0x000C) # Destination IP Address
92-
_REG_SNDPORT = const(0x0010) # Destination Port
93-
_REG_SNRX_RSR = const(0x0026) # RX Free Size
94-
_REG_SNRX_RD = const(0x0028) # Read Size Pointer
95-
_REG_SNTX_FSR = const(0x0020) # Socket n TX Free Size
96-
_REG_SNTX_WR = const(0x0024) # TX Write Pointer
85+
# *** Wiznet Socket Registers ***
86+
# Socket n Mode.
87+
_REG_SNMR = const(0x0000)
88+
# Socket n Command.
89+
_REG_SNCR = {"w5100s": const(0x0001), "w5500": const(0x0001), "w6100": const(0x0010)}
90+
# Socket n Interrupt.
91+
_REG_SNIR = {"w5100s": const(0x0002), "w5500": const(0x0002), "w6100": const(0x0020)}
92+
# Socket n Status.
93+
_REG_SNSR = {"w5100s": const(0x0003), "w5500": const(0x0003), "w6100": const(0x0030)}
94+
# Socket n Source Port.
95+
_REG_SNPORT = {"w5100s": const(0x0004), "w5500": const(0x0004), "w6100": const(0x0114)}
96+
# Destination IPv4 Address.
97+
_REG_SNDIPR = {"w5100s": const(0x000C), "w5500": const(0x000C), "w6100": const(0x0120)}
98+
# Destination Port.
99+
_REG_SNDPORT = {"w5100s": const(0x0010), "w5500": const(0x0010), "w6100": const(0x0140)}
100+
# RX Free Size.
101+
_REG_SNRX_RSR = {
102+
"w5100s": const(0x0026),
103+
"w5500": const(0x0026),
104+
"w6100": const(0x0224),
105+
}
106+
# Read Size Pointer.
107+
_REG_SNRX_RD = {"w5100s": const(0x0028), "w5500": const(0x0028), "w6100": const(0x0228)}
108+
# Socket n TX Free Size.
109+
_REG_SNTX_FSR = {
110+
"w5100s": const(0x0020),
111+
"w5500": const(0x0020),
112+
"w6100": const(0x0204),
113+
}
114+
# TX Write Pointer.
115+
_REG_SNTX_WR = {"w5100s": const(0x0024), "w5500": const(0x0024), "w6100": const(0x020C)}
97116

98117
# SNSR Commands
99118
SNSR_SOCK_CLOSED = const(0x00)
@@ -149,7 +168,7 @@
149168
_DEFAULT_MAC = (0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED)
150169

151170
# Maximum number of sockets to support, differs between chip versions.
152-
_MAX_SOCK_NUM = {"w5100s": const(0x04), "w5500": const(0x08)}
171+
_MAX_SOCK_NUM = {"w5100s": const(0x04), "w5500": const(0x08), "w6100": const(0x08)}
153172
_SOCKET_INVALID = const(0xFF)
154173

155174

@@ -405,7 +424,7 @@ def remote_ip(self, socket_num: int) -> str:
405424
self._sock_num_in_range(socket_num)
406425
for octet in range(4):
407426
self._pbuff[octet] = self._read_socket_register(
408-
socket_num, _REG_SNDIPR + octet
427+
socket_num, _REG_SNDIPR[self._chip_type] + octet
409428
)
410429
return self.pretty_ip(self._pbuff[:4])
411430

@@ -420,7 +439,7 @@ def remote_port(self, socket_num: int) -> int:
420439
:raises ValueError: If the socket number is out of range.
421440
"""
422441
self._sock_num_in_range(socket_num)
423-
return self._read_two_byte_sock_reg(socket_num, _REG_SNDPORT)
442+
return self._read_two_byte_sock_reg(socket_num, _REG_SNDPORT[self._chip_type])
424443

425444
@property
426445
def link_status(self) -> bool:
@@ -1120,27 +1139,27 @@ def _get_tx_free_size(self, sock: int) -> int:
11201139

11211140
def _read_snrx_rd(self, sock: int) -> int:
11221141
"""Read socket n RX Read Data Pointer Register."""
1123-
return self._read_two_byte_sock_reg(sock, _REG_SNRX_RD)
1142+
return self._read_two_byte_sock_reg(sock, _REG_SNRX_RD[self._chip_type])
11241143

11251144
def _write_snrx_rd(self, sock: int, data: int) -> None:
11261145
"""Write socket n RX Read Data Pointer Register."""
1127-
self._write_two_byte_sock_reg(sock, _REG_SNRX_RD, data)
1146+
self._write_two_byte_sock_reg(sock, _REG_SNRX_RD[self._chip_type], data)
11281147

11291148
def _read_sntx_wr(self, sock: int) -> int:
11301149
"""Read the socket write buffer pointer for socket `sock`."""
1131-
return self._read_two_byte_sock_reg(sock, _REG_SNTX_WR)
1150+
return self._read_two_byte_sock_reg(sock, _REG_SNTX_WR[self._chip_type])
11321151

11331152
def _write_sntx_wr(self, sock: int, data: int) -> None:
11341153
"""Write the socket write buffer pointer for socket `sock`."""
1135-
self._write_two_byte_sock_reg(sock, _REG_SNTX_WR, data)
1154+
self._write_two_byte_sock_reg(sock, _REG_SNTX_WR[self._chip_type], data)
11361155

11371156
def _read_sntx_fsr(self, sock: int) -> int:
11381157
"""Read socket n TX Free Size Register"""
1139-
return self._read_two_byte_sock_reg(sock, _REG_SNTX_FSR)
1158+
return self._read_two_byte_sock_reg(sock, _REG_SNTX_FSR[self._chip_type])
11401159

11411160
def _read_snrx_rsr(self, sock: int) -> int:
11421161
"""Read socket n Received Size Register"""
1143-
return self._read_two_byte_sock_reg(sock, _REG_SNRX_RSR)
1162+
return self._read_two_byte_sock_reg(sock, _REG_SNRX_RSR[self._chip_type])
11441163

11451164
def _read_sndipr(self, sock) -> bytes:
11461165
"""Read socket destination IP address."""
@@ -1154,23 +1173,25 @@ def _read_sndipr(self, sock) -> bytes:
11541173
def write_sndipr(self, sock: int, ip_addr: bytes) -> None:
11551174
"""Write to socket destination IP Address."""
11561175
for offset, value in enumerate(ip_addr):
1157-
self._write_socket_register(sock, _REG_SNDIPR + offset, value)
1176+
self._write_socket_register(
1177+
sock, _REG_SNDIPR[self._chip_type] + offset, value
1178+
)
11581179

11591180
def write_sndport(self, sock: int, port: int) -> None:
11601181
"""Write to socket destination port."""
1161-
self._write_two_byte_sock_reg(sock, _REG_SNDPORT, port)
1182+
self._write_two_byte_sock_reg(sock, _REG_SNDPORT[self._chip_type], port)
11621183

11631184
def read_snsr(self, sock: int) -> int:
11641185
"""Read Socket n Status Register."""
1165-
return self._read_socket_register(sock, _REG_SNSR)
1186+
return self._read_socket_register(sock, _REG_SNSR[self._chip_type])
11661187

11671188
def read_snir(self, sock: int) -> int:
11681189
"""Read Socket n Interrupt Register."""
1169-
return self._read_socket_register(sock, _REG_SNIR)
1190+
return self._read_socket_register(sock, _REG_SNIR[self._chip_type])
11701191

11711192
def write_snir(self, sock: int, data: int) -> None:
11721193
"""Write to Socket n Interrupt Register."""
1173-
self._write_socket_register(sock, _REG_SNIR, data)
1194+
self._write_socket_register(sock, _REG_SNIR[self._chip_type], data)
11741195

11751196
def _read_snmr(self, sock: int) -> int:
11761197
"""Read the socket MR register."""
@@ -1182,13 +1203,13 @@ def write_snmr(self, sock: int, protocol: int) -> None:
11821203

11831204
def write_sock_port(self, sock: int, port: int) -> None:
11841205
"""Write to the socket port number."""
1185-
self._write_two_byte_sock_reg(sock, _REG_SNPORT, port)
1206+
self._write_two_byte_sock_reg(sock, _REG_SNPORT[self._chip_type], port)
11861207

11871208
def write_sncr(self, sock: int, data: int) -> None:
11881209
"""Write to socket command register."""
1189-
self._write_socket_register(sock, _REG_SNCR, data)
1210+
self._write_socket_register(sock, _REG_SNCR[self._chip_type], data)
11901211
# Wait for command to complete before continuing.
1191-
while self._read_socket_register(sock, _REG_SNCR):
1212+
while self._read_socket_register(sock, _REG_SNCR[self._chip_type]):
11921213
pass
11931214

11941215
@property

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