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hathachhathach
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Merge pull request #329 from adafruit/update-tinyusb-7bf5923052e5861f54c9cb0581e328f8be26a0a9
update tinyusb to commit 7bf5923052e5861f54c9cb0581e328f8be26a0a9
2 parents 4a93c7d + d6f51fa commit b16bbbf

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‎src/class/audio/audio_device.c

Lines changed: 41 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -60,13 +60,30 @@
6060

6161
#include "audio_device.h"
6262

63+
//--------------------------------------------------------------------+
64+
// ESP32 out-of-sync
65+
//--------------------------------------------------------------------+
66+
#if defined(ARDUINO_ARCH_ESP32) && !defined(tu_static)
67+
#define tu_static static
68+
static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) { if (count > destsz) { return -1; } memset(dest, ch, count); return 0; }
69+
static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count ) { if (count > destsz) { return -1; } memcpy(dest, src, count); return 0; }
70+
#endif
71+
72+
#ifndef CFG_TUD_MEM_SECTION
73+
#define CFG_TUD_MEM_SECTION CFG_TUSB_MEM_SECTION
74+
#endif
75+
76+
#ifndef CFG_TUD_LOG_LEVEL
77+
#define CFG_TUD_LOG_LEVEL 2
78+
#endif
79+
6380
//--------------------------------------------------------------------+
6481
// MACRO CONSTANT TYPEDEF
6582
//--------------------------------------------------------------------+
6683

6784
// Use ring buffer if it's available, some MCUs need extra RAM requirements
6885
#ifndef TUD_AUDIO_PREFER_RING_BUFFER
69-
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT
86+
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
7087
#define TUD_AUDIO_PREFER_RING_BUFFER 0
7188
#else
7289
#define TUD_AUDIO_PREFER_RING_BUFFER 1
@@ -85,7 +102,7 @@
85102
CFG_TUSB_MCU == OPT_MCU_RX72N || \
86103
CFG_TUSB_MCU == OPT_MCU_LPC18XX || \
87104
CFG_TUSB_MCU == OPT_MCU_LPC43XX || \
88-
CFG_TUSB_MCU == OPT_MCU_MIMXRT || \
105+
CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX || \
89106
CFG_TUSB_MCU == OPT_MCU_MSP432E4
90107
#if TUD_AUDIO_PREFER_RING_BUFFER
91108
#define USE_LINEAR_BUFFER 0
@@ -113,21 +130,21 @@
113130
// EP IN software buffers and mutexes
114131
#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
115132
#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
116-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
133+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
117134
#if CFG_FIFO_MUTEX
118135
osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO
119136
#endif
120137
#endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
121138

122139
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
123-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
140+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
124141
#if CFG_FIFO_MUTEX
125142
osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO
126143
#endif
127144
#endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
128145

129146
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
130-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
147+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
131148
#if CFG_FIFO_MUTEX
132149
osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO
133150
#endif
@@ -139,36 +156,36 @@
139156
// - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
140157
#if CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_ENCODING)
141158
#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0
142-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
159+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
143160
#endif
144161

145162
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0
146-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
163+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
147164
#endif
148165

149166
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0
150-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
167+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
151168
#endif
152169
#endif // CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
153170

154171
// EP OUT software buffers and mutexes
155172
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
156173
#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
157-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
174+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
158175
#if CFG_FIFO_MUTEX
159176
osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO
160177
#endif
161178
#endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
162179

163180
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
164-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
181+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
165182
#if CFG_FIFO_MUTEX
166183
osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO
167184
#endif
168185
#endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
169186

170187
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
171-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
188+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
172189
#if CFG_FIFO_MUTEX
173190
osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO
174191
#endif
@@ -180,27 +197,27 @@
180197
// - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
181198
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
182199
#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0
183-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
200+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
184201
#endif
185202

186203
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0
187-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
204+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
188205
#endif
189206

190207
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0
191-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
208+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
192209
#endif
193210
#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
194211

195212
// Control buffers
196-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
213+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
197214

198215
#if CFG_TUD_AUDIO > 1
199-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
216+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
200217
#endif
201218

202219
#if CFG_TUD_AUDIO > 2
203-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
220+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
204221
#endif
205222

206223
// Active alternate setting of interfaces
@@ -217,23 +234,23 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
217234
// Software encoding/decoding support FIFOs
218235
#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
219236
#if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
220-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
237+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
221238
tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
222239
#if CFG_FIFO_MUTEX
223240
osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
224241
#endif
225242
#endif
226243

227244
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0
228-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
245+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
229246
tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
230247
#if CFG_FIFO_MUTEX
231248
osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
232249
#endif
233250
#endif
234251

235252
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0
236-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
253+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
237254
tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
238255
#if CFG_FIFO_MUTEX
239256
osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -243,23 +260,23 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
243260

244261
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
245262
#if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0
246-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
263+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
247264
tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
248265
#if CFG_FIFO_MUTEX
249266
osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
250267
#endif
251268
#endif
252269

253270
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0
254-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
271+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
255272
tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
256273
#if CFG_FIFO_MUTEX
257274
osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
258275
#endif
259276
#endif
260277

261278
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0
262-
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
279+
CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
263280
tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
264281
#if CFG_FIFO_MUTEX
265282
osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -416,7 +433,7 @@ typedef struct
416433
//--------------------------------------------------------------------+
417434
// INTERNAL OBJECT & FUNCTION DECLARATION
418435
//--------------------------------------------------------------------+
419-
CFG_TUSB_MEM_SECTION audiod_function_t _audiod_fct[CFG_TUD_AUDIO];
436+
CFG_TUD_MEM_SECTION audiod_function_t _audiod_fct[CFG_TUD_AUDIO];
420437

421438
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
422439
static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t n_bytes_received);

‎src/class/bth/bth_device.c

Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,23 @@
3434
#include "bth_device.h"
3535
#include <device/usbd_pvt.h>
3636

37+
//--------------------------------------------------------------------+
38+
// ESP32 out-of-sync
39+
//--------------------------------------------------------------------+
40+
#if defined(ARDUINO_ARCH_ESP32) && !defined(tu_static)
41+
#define tu_static static
42+
static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) { if (count > destsz) { return -1; } memset(dest, ch, count); return 0; }
43+
static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count ) { if (count > destsz) { return -1; } memcpy(dest, src, count); return 0; }
44+
#endif
45+
46+
#ifndef CFG_TUD_MEM_SECTION
47+
#define CFG_TUD_MEM_SECTION CFG_TUSB_MEM_SECTION
48+
#endif
49+
50+
#ifndef CFG_TUD_LOG_LEVEL
51+
#define CFG_TUD_LOG_LEVEL 2
52+
#endif
53+
3754
//--------------------------------------------------------------------+
3855
// MACRO CONSTANT TYPEDEF
3956
//--------------------------------------------------------------------+
@@ -55,7 +72,7 @@ typedef struct
5572
//--------------------------------------------------------------------+
5673
// INTERNAL OBJECT & FUNCTION DECLARATION
5774
//--------------------------------------------------------------------+
58-
CFG_TUSB_MEM_SECTION btd_interface_t _btd_itf;
75+
CFG_TUD_MEM_SECTION btd_interface_t _btd_itf;
5976

6077
static bool bt_tx_data(uint8_t ep, void *data, uint16_t len)
6178
{

‎src/class/cdc/cdc_device.c

Lines changed: 35 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,34 @@
3333

3434
#include "cdc_device.h"
3535

36+
//--------------------------------------------------------------------+
37+
// ESP32 out-of-sync
38+
//--------------------------------------------------------------------+
39+
#if defined(ARDUINO_ARCH_ESP32) && !defined(tu_static)
40+
#define tu_static static
41+
static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) { if (count > destsz) { return -1; } memset(dest, ch, count); return 0; }
42+
static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count ) { if (count > destsz) { return -1; } memcpy(dest, src, count); return 0; }
43+
#endif
44+
45+
#ifndef CFG_TUD_MEM_SECTION
46+
#define CFG_TUD_MEM_SECTION CFG_TUSB_MEM_SECTION
47+
#endif
48+
49+
#ifndef CFG_TUD_LOG_LEVEL
50+
#define CFG_TUD_LOG_LEVEL 2
51+
#endif
52+
53+
//--------------------------------------------------------------------+
54+
//
55+
//--------------------------------------------------------------------+
56+
57+
// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
58+
#ifndef CFG_TUD_CDC_LOG_LEVEL
59+
#define CFG_TUD_CDC_LOG_LEVEL CFG_TUD_LOG_LEVEL
60+
#endif
61+
62+
#define TU_LOG_DRV(...) TU_LOG(CFG_TUD_CDC_LOG_LEVEL, __VA_ARGS__)
63+
3664
//--------------------------------------------------------------------+
3765
// MACRO CONSTANT TYPEDEF
3866
//--------------------------------------------------------------------+
@@ -76,7 +104,7 @@ typedef struct
76104
//--------------------------------------------------------------------+
77105
// INTERNAL OBJECT & FUNCTION DECLARATION
78106
//--------------------------------------------------------------------+
79-
CFG_TUSB_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
107+
CFG_TUD_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
80108

81109
static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
82110
{
@@ -143,7 +171,7 @@ uint32_t tud_cdc_n_available(uint8_t itf)
143171
uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize)
144172
{
145173
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
146-
uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) bufsize);
174+
uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
147175
_prep_out_transaction(p_cdc);
148176
return num_read;
149177
}
@@ -166,7 +194,7 @@ void tud_cdc_n_read_flush (uint8_t itf)
166194
uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize)
167195
{
168196
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
169-
uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) bufsize);
197+
uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
170198

171199
// flush if queue more than packet size
172200
// may need to suppress -Wunreachable-code since most of the time CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE
@@ -353,7 +381,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
353381
case CDC_REQUEST_SET_LINE_CODING:
354382
if (stage == CONTROL_STAGE_SETUP)
355383
{
356-
TU_LOG2(" Set Line Coding\r\n");
384+
TU_LOG_DRV(" Set Line Coding\r\n");
357385
tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
358386
}
359387
else if ( stage == CONTROL_STAGE_ACK)
@@ -365,7 +393,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
365393
case CDC_REQUEST_GET_LINE_CODING:
366394
if (stage == CONTROL_STAGE_SETUP)
367395
{
368-
TU_LOG2(" Get Line Coding\r\n");
396+
TU_LOG_DRV(" Get Line Coding\r\n");
369397
tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
370398
}
371399
break;
@@ -390,7 +418,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
390418
// Disable fifo overwriting if DTR bit is set
391419
tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
392420

393-
TU_LOG2(" Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
421+
TU_LOG_DRV(" Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
394422

395423
// Invoke callback
396424
if ( tud_cdc_line_state_cb ) tud_cdc_line_state_cb(itf, dtr, rts);
@@ -403,7 +431,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
403431
}
404432
else if (stage == CONTROL_STAGE_ACK)
405433
{
406-
TU_LOG2(" Send Break\r\n");
434+
TU_LOG_DRV(" Send Break\r\n");
407435
if ( tud_cdc_send_break_cb ) tud_cdc_send_break_cb(itf, request->wValue);
408436
}
409437
break;

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