Skip to content

Commit 1064e73

Browse files
hathachhathach
committed
correct pin mapping
1 parent 324285c commit 1064e73

File tree

5 files changed

+73
-62
lines changed

5 files changed

+73
-62
lines changed

‎cores/nRF5/Arduino.h

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -114,21 +114,17 @@ uint32_t setLoopStacksize(void);
114114
#define bit(b) (1UL << (b))
115115

116116
#ifdef NRF_P1
117-
#define digitalPinToPort(P) ( ((P) < 32) ? NRF_P0 : NRF_P1 )
117+
#define digitalPinToPort(P) ( (g_ADigitalPinMap[P] < 32) ? NRF_P0 : NRF_P1 )
118118
#else
119119
#define digitalPinToPort(P) ( NRF_P0 )
120120
#endif
121121

122-
#define digitalPinToBitMask(P) ( 1UL << ( (P) < 32 ? (P) : ((P)-32) ) )
122+
#define digitalPinToBitMask(P) ( 1UL << ( g_ADigitalPinMap[P] < 32 ? g_ADigitalPinMap[P] : (g_ADigitalPinMap[P]-32) ) )
123123
//#define analogInPinToBit(P) ( )
124124
#define portOutputRegister(port) ( &(port->OUT) )
125125
#define portInputRegister(port) ( (volatile uint32_t*) &(port->IN) )
126126
#define portModeRegister(port) ( &(port->DIR) )
127-
128-
#define digitalPinHasPWM(P) ( (P) > 1 )
129-
130-
// PIN_CNF for nrf52
131-
#define digitalPinCnfRegister(P) ( &(digitalPinToPort(P)->PIN_CNF[(P) < 32 ? (P): ((P)-32)]) )
127+
#define digitalPinHasPWM(P) ( g_ADigitalPinMap[P] > 1 )
132128

133129
void rtos_idle_callback(void) ATTR_WEAK;
134130
/*

‎cores/nRF5/WVariant.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323
#include "nrf.h"
2424
#include "nrf_soc.h"
2525
#include "nrf_sdm.h"
26+
#include "nrf_gpio.h"
2627

2728
#ifdef __cplusplus
2829
extern "C" {

‎cores/nRF5/wiring.c

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -120,9 +120,15 @@ void systemOff(uint32_t pin, uint8_t wake_logic)
120120
// NRF_POWER->RAM[i].POWERCLR = 0x03UL;
121121
// }
122122

123-
pinMode(pin, wake_logic ? INPUT_PULLDOWN : INPUT_PULLUP);
123+
pin = g_ADigitalPinMap[pin];
124124

125-
*digitalPinCnfRegister(pin) |= ((wake_logic ? GPIO_PIN_CNF_SENSE_High : GPIO_PIN_CNF_SENSE_Low) << GPIO_PIN_CNF_SENSE_Pos);
125+
if ( wake_logic )
126+
{
127+
nrf_gpio_cfg_sense_input(pin, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH);
128+
}else
129+
{
130+
nrf_gpio_cfg_sense_input(pin, NRF_GPIO_PIN_PULLUP, NRF_GPIO_PIN_SENSE_LOW);
131+
}
126132

127133
uint8_t sd_en;
128134
(void) sd_softdevice_is_enabled(&sd_en);

‎cores/nRF5/wiring_digital.c

Lines changed: 34 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -33,44 +33,46 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
3333

3434
ulPin = g_ADigitalPinMap[ulPin];
3535

36+
NRF_GPIO_Type * port = nrf_gpio_pin_port_decode(&ulPin);
37+
3638
// Set pin mode according to chapter '22.6.3 I/O Pin Configuration'
3739
switch ( ulMode )
3840
{
3941
case INPUT:
4042
// Set pin to input mode
41-
*digitalPinCnfRegister(ulPin) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
42-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
43-
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
44-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
45-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
46-
break ;
43+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
44+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
45+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
46+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
47+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
48+
break;
4749

4850
case INPUT_PULLUP:
4951
// Set pin to input mode with pull-up resistor enabled
50-
*digitalPinCnfRegister(ulPin) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
51-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
52-
| ((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
53-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
54-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
55-
break ;
52+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
53+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
54+
| ((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
55+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
56+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
57+
break;
5658

5759
case INPUT_PULLDOWN:
5860
// Set pin to input mode with pull-down resistor enabled
59-
*digitalPinCnfRegister(ulPin) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
60-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
61-
| ((uint32_t)GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos)
62-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
63-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
64-
break ;
61+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
62+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
63+
| ((uint32_t)GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos)
64+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
65+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
66+
break;
6567

6668
case OUTPUT:
6769
// Set pin to output mode
68-
*digitalPinCnfRegister(ulPin) = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
69-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
70-
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
71-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
72-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
73-
break ;
70+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
71+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
72+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
73+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
74+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
75+
break;
7476

7577
default:
7678
// do nothing
@@ -85,16 +87,17 @@ void digitalWrite( uint32_t ulPin, uint32_t ulVal )
8587
}
8688

8789
ulPin = g_ADigitalPinMap[ulPin];
88-
NRF_GPIO_Type* nrf_port = (NRF_GPIO_Type*) digitalPinToPort(ulPin);
90+
91+
NRF_GPIO_Type * port = nrf_gpio_pin_port_decode(&ulPin);
8992

9093
switch ( ulVal )
9194
{
9295
case LOW:
93-
nrf_port->OUTCLR = digitalPinToBitMask(ulPin);
96+
port->OUTCLR = (1UL << ulPin);
9497
break ;
9598

9699
default:
97-
nrf_port->OUTSET = digitalPinToBitMask(ulPin);
100+
port->OUTSET = (1UL << ulPin);
98101
break ;
99102
}
100103
}
@@ -107,12 +110,11 @@ int digitalRead( uint32_t ulPin )
107110

108111
ulPin = g_ADigitalPinMap[ulPin];
109112

110-
// Return bit in OUT or IN depending on configured direction
111-
NRF_GPIO_Type* nrf_port = (NRF_GPIO_Type*) digitalPinToPort(ulPin);
112-
113-
if ( ulPin > 32 ) ulPin -= 32;
113+
NRF_GPIO_Type * port = nrf_gpio_pin_port_decode(&ulPin);
114+
uint32_t const bm = (1UL << ulPin);
114115

115-
return bitRead(nrf_port->DIR, ulPin) ? bitRead(nrf_port->OUT, ulPin) : bitRead(nrf_port->IN, ulPin);
116+
// Return bit in OUT or IN depending on configured direction
117+
return (bm & ((port->DIR & bm) ? port->OUT : port->IN)) ? 1 : 0;
116118
}
117119

118120
void digitalToggle( uint32_t pin )

‎libraries/Wire/Wire_nRF52.cpp

Lines changed: 27 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,12 @@ extern "C" {
2929

3030
#include "Wire.h"
3131

32+
static volatile uint32_t* pincfg_reg(uint32_t pin)
33+
{
34+
NRF_GPIO_Type * port = nrf_gpio_pin_port_decode(&pin);
35+
return &port->PIN_CNF[pin];
36+
}
37+
3238
TwoWire::TwoWire(NRF_TWIM_Type * p_twim, NRF_TWIS_Type * p_twis, IRQn_Type IRQn, uint8_t pinSDA, uint8_t pinSCL)
3339
{
3440
this->_p_twim = p_twim;
@@ -43,17 +49,17 @@ void TwoWire::begin(void) {
4349
//Master Mode
4450
master = true;
4551

46-
*digitalPinCnfRegister(_uc_pinSCL) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
47-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
48-
| ((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
49-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
50-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
52+
*pincfg_reg(_uc_pinSCL) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
53+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
54+
| ((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
55+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
56+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
5157

52-
*digitalPinCnfRegister(_uc_pinSDA) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
53-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
54-
| ((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
55-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
56-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
58+
*pincfg_reg(_uc_pinSDA) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
59+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
60+
| ((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
61+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
62+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
5763

5864
_p_twim->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K100;
5965
_p_twim->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos);
@@ -69,17 +75,17 @@ void TwoWire::begin(uint8_t address) {
6975
//Slave mode
7076
master = false;
7177

72-
*digitalPinCnfRegister(_uc_pinSCL) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
73-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
74-
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
75-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
76-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
77-
78-
*digitalPinCnfRegister(_uc_pinSDA) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
79-
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
80-
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
81-
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
82-
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
78+
*pincfg_reg(_uc_pinSCL) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
79+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
80+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
81+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
82+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
83+
84+
*pincfg_reg(_uc_pinSDA) = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
85+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
86+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
87+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
88+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
8389

8490
_p_twis->ADDRESS[0] = address;
8591
_p_twis->CONFIG = TWIS_CONFIG_ADDRESS0_Msk;

0 commit comments

Comments
 (0)