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#include < wiring_private.h>
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#include < assert.h>
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- #define SPI_IMODE_NONE 0
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- #define SPI_IMODE_EXTINT 1
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- #define SPI_IMODE_GLOBAL 2
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-
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- const SPISettings DEFAULT_SPI_SETTINGS = SPISettings();
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-
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- SPIClass::SPIClass (NRF_SPI_Type *p_spi, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint8_t uc_pinMOSI)
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+ SPIClass::SPIClass (NRF_SPIM_Type *p_spi, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint8_t uc_pinMOSI)
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{
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initialized = false ;
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assert (p_spi != NULL );
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- _p_spi = p_spi;
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- #ifdef NRF52840_XXAA
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- _spim.p_reg = NRF_SPIM3;
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- _spim.drv_inst_idx = NRFX_SPIM3_INST_IDX;
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- #else
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- _spim.p_reg = NRF_SPIM0;
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- _spim.drv_inst_idx = NRFX_SPIM0_INST_IDX;
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- #endif
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+ _spim.p_reg = p_spi;
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+
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+ if ( NRF_SPIM0 == p_spi ) {
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+ _spim.drv_inst_idx = NRFX_SPIM0_INST_IDX;
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+ } else if ( NRF_SPIM1 == p_spi ) {
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+ _spim.drv_inst_idx = NRFX_SPIM1_INST_IDX;
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+ } else if ( NRF_SPIM2 == p_spi ) {
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+ _spim.drv_inst_idx = NRFX_SPIM2_INST_IDX;
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+ } else {
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+ _spim.drv_inst_idx = NRFX_SPIM3_INST_IDX;
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+ }
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// pins
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_uc_pinMiso = g_ADigitalPinMap[uc_pinMISO];
@@ -67,64 +64,22 @@ void SPIClass::begin()
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.ss_active_high = false ,
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.irq_priority = 3 ,
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.orc = 0xFF ,
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- .frequency = NRF_SPIM_FREQ_32M, // NRF_SPIM_FREQ_4M,
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+ // default setting 4 Mhz, Mode 0, MSB first
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+ .frequency = NRF_SPIM_FREQ_4M,
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.mode = NRF_SPIM_MODE_0,
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.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST,
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};
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+ _dataMode = SPI_MODE0;
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+ _bitOrder = NRF_SPIM_BIT_ORDER_MSB_FIRST;
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+
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// blocking
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nrfx_spim_init (&_spim, &cfg, NULL , NULL );
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-
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- _p_spi->PSELSCK = _uc_pinSCK;
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- _p_spi->PSELMOSI = _uc_pinMosi;
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- _p_spi->PSELMISO = _uc_pinMiso;
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-
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- config (DEFAULT_SPI_SETTINGS);
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- }
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-
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- void SPIClass::config (SPISettings settings)
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- {
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- #if 0
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- _p_spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
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-
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- uint32_t config = settings.bitOrder;
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-
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- switch (settings.dataMode) {
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- default:
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- case SPI_MODE0:
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- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE1:
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- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE2:
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- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE3:
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- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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- break;
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- }
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-
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- _p_spi->CONFIG = config;
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- _p_spi->FREQUENCY = settings.clockFreq;
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-
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- _p_spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
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- #endif
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}
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void SPIClass::end ()
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{
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- // _p_spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
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-
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nrfx_spim_uninit (&_spim);
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-
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initialized = false ;
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}
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@@ -134,116 +89,88 @@ void SPIClass::usingInterrupt(int /*interruptNumber*/)
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void SPIClass::beginTransaction (SPISettings settings)
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{
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- // config(settings);
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+ nrf_spim_disable (_spim.p_reg );
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+
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+ this ->_dataMode = settings.dataMode ;
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+ this ->_bitOrder = (settings.bitOrder == MSBFIRST ? NRF_SPIM_BIT_ORDER_MSB_FIRST : NRF_SPIM_BIT_ORDER_LSB_FIRST);
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+
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+ nrf_spim_configure (_spim.p_reg , (nrf_spim_mode_t ) _dataMode, (nrf_spim_bit_order_t ) _bitOrder);
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+
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+ setClockDivider (F_CPU / settings.clockFreq );
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+
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+ nrf_spim_enable (_spim.p_reg );
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}
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void SPIClass::endTransaction (void )
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{
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- // _p_spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos );
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+ nrf_spim_disable (_spim. p_reg );
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}
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void SPIClass::setBitOrder (BitOrder order)
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{
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- #if 0
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- this->_bitOrder = (order == MSBFIRST ? SPI_CONFIG_ORDER_MsbFirst : SPI_CONFIG_ORDER_LsbFirst);
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-
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- uint32_t config = this->_bitOrder;
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-
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- switch (this->_dataMode) {
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- default:
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- case SPI_MODE0:
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- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE1:
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- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE2:
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- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE3:
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- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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- break;
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- }
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-
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- _p_spi->CONFIG = config;
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- #endif
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+ this ->_bitOrder = (order == MSBFIRST ? NRF_SPIM_BIT_ORDER_MSB_FIRST : NRF_SPIM_BIT_ORDER_LSB_FIRST);
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+ nrf_spim_configure (_spim.p_reg , (nrf_spim_mode_t ) _dataMode, (nrf_spim_bit_order_t ) _bitOrder);
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}
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void SPIClass::setDataMode (uint8_t mode)
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{
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- #if 0
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this ->_dataMode = mode;
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-
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- uint32_t config = this->_bitOrder;
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-
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- switch (this->_dataMode) {
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- default:
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- case SPI_MODE0:
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- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE1:
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- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE2:
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- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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- break;
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-
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- case SPI_MODE3:
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- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
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- config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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- break;
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- }
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-
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- _p_spi->CONFIG = config;
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- #endif
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+ nrf_spim_configure (_spim.p_reg , (nrf_spim_mode_t ) _dataMode, (nrf_spim_bit_order_t ) _bitOrder);
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}
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void SPIClass::setClockDivider (uint8_t div)
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{
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- #if 0
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- uint32_t clockFreq;
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+ nrf_spim_frequency_t clockFreq;
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// Adafruit Note: nrf52 run at 64MHz
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if (div >= SPI_CLOCK_DIV512) {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_K125 ;
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+ clockFreq = NRF_SPIM_FREQ_125K ;
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} else if (div >= SPI_CLOCK_DIV256) {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_K250 ;
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+ clockFreq = NRF_SPIM_FREQ_250K ;
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} else if (div >= SPI_CLOCK_DIV128) {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_K500 ;
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+ clockFreq = NRF_SPIM_FREQ_500K ;
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} else if (div >= SPI_CLOCK_DIV64) {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_M1 ;
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+ clockFreq = NRF_SPIM_FREQ_1M ;
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} else if (div >= SPI_CLOCK_DIV32) {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_M2 ;
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+ clockFreq = NRF_SPIM_FREQ_2M ;
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} else if (div >= SPI_CLOCK_DIV16) {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_M4;
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+ clockFreq = NRF_SPIM_FREQ_4M;
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+ } else if (div >= SPI_CLOCK_DIV8) {
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+ clockFreq = NRF_SPIM_FREQ_8M;
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} else {
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- clockFreq = SPI_FREQUENCY_FREQUENCY_M8;
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+ #ifdef NRF52840_XXAA
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+ if ( _spim.drv_inst_idx == NRFX_SPIM3_INST_IDX )
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+ {
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+ if (div >= SPI_CLOCK_DIV4) {
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+ clockFreq = NRF_SPIM_FREQ_16M;
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+ }else {
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+ clockFreq = NRF_SPIM_FREQ_32M;
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+ }
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+ }else
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+ #endif
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+ {
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+ clockFreq = NRF_SPIM_FREQ_8M;
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+ }
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}
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- _p_spi->FREQUENCY = clockFreq;
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- #endif
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+ nrf_spim_frequency_set (_spim.p_reg , clockFreq);
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+ }
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+
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+ void SPIClass::transfer (const void *tx_buf, void *rx_buf, size_t count)
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+ {
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+ nrfx_spim_xfer_desc_t xfer_desc =
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+ {
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+ .p_tx_buffer = (uint8_t *) tx_buf,
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+ .tx_length = tx_buf ? count : 0 ,
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+ .p_rx_buffer = (uint8_t *) rx_buf,
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+ .rx_length = rx_buf ? count : 0 ,
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+ };
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+
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+ nrfx_spim_xfer (&_spim, &xfer_desc, 0 );
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}
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void SPIClass::transfer (void *buf, size_t count)
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{
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- #if 0
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- // TODO: Optimize for faster block-transfer
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- uint8_t *buffer = reinterpret_cast<uint8_t *>(buf);
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- for (size_t i=0; i<count; i++)
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- buffer[i] = transfer(buffer[i]);
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- #else
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nrfx_spim_xfer_desc_t xfer_desc =
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{
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.p_tx_buffer = (uint8_t *) buf,
@@ -253,25 +180,12 @@ void SPIClass::transfer(void *buf, size_t count)
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};
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nrfx_spim_xfer (&_spim, &xfer_desc, 0 );
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- #endif
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}
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byte SPIClass::transfer (uint8_t data)
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{
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- #if 0
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- _p_spi->TXD = data;
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-
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- while(!_p_spi->EVENTS_READY);
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-
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- data = _p_spi->RXD;
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-
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- _p_spi->EVENTS_READY = 0x0UL;
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-
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- return data;
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- #else
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transfer (&data, 1 );
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return data;
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- #endif
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}
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uint16_t SPIClass::transfer16 (uint16_t data) {
@@ -280,7 +194,7 @@ uint16_t SPIClass::transfer16(uint16_t data) {
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t.val = data;
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- if (_bitOrder == SPI_CONFIG_ORDER_LsbFirst ) {
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+ if (_bitOrder == NRF_SPIM_BIT_ORDER_LSB_FIRST ) {
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t.lsb = transfer (t.lsb );
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t.msb = transfer (t.msb );
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} else {
@@ -300,9 +214,14 @@ void SPIClass::detachInterrupt() {
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}
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#if SPI_INTERFACES_COUNT > 0
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- SPIClass SPI (NRF_SPI0, PIN_SPI_MISO, PIN_SPI_SCK, PIN_SPI_MOSI);
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+ #ifdef NRF52840_XXAA
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+ // use SPIM3 for nrf52840 for highspeed 32Mhz
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+ SPIClass SPI (NRF_SPIM3, PIN_SPI_MISO, PIN_SPI_SCK, PIN_SPI_MOSI);
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+ #else
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+ SPIClass SPI (NRF_SPIM0, PIN_SPI_MISO, PIN_SPI_SCK, PIN_SPI_MOSI);
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+ #endif
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#endif
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#if SPI_INTERFACES_COUNT > 1
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- SPIClass SPI1 (NRF_SPI1 , PIN_SPI1_MISO, PIN_SPI1_SCK, PIN_SPI1_MOSI);
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+ SPIClass SPI1 (NRF_SPIM1 , PIN_SPI1_MISO, PIN_SPI1_SCK, PIN_SPI1_MOSI);
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#endif
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