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add linker description
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variants/feather52/feather52_s132.ld

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,20 +7,20 @@ MEMORY
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{
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FLASH (rx) : ORIGIN = 0x1c000, LENGTH = 0x64000
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10-
/* ATTR SIZE = 0x0580, (central, prph, sec) = (0, 1, 0) */
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/* RAM (rwx) : ORIGIN = 0x20002080, LENGTH = 0xdf80 */
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/* ATTR SIZE = 0x1000, (central, prph, sec) = (0, 1, 0) */
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/* RAM (rwx) : ORIGIN = 0x20002B00, LENGTH = 0xD500 */
10+
/* SRAM required by S132 depend on
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* - Attribute Table Size
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* - Number of concurrent connection central + peripherl + secure links
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* Several configuration with different SRAM config is included for reference
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*/
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/* ATTR SIZE = 0x0B00, (central, prph, sec) = (0, 1, 0) */
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/*RAM (rwx) : ORIGIN = 0x20001B00 + 0x0B00, LENGTH = 0xE500 - 0x0B00*/
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/* RAM (rwx) : ORIGIN = 0x20001B00 + 0x0B00, LENGTH = 0xE500 - 0x0B00 */
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/* ATTR SIZE = 0x0B00, (central, prph, sec) = (4, 1, 1) */
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RAM (rwx) : ORIGIN = 0x20001B00 + 0x0B00 + 0x1280, LENGTH = 0xE500 - 0x0B00 - 0x1280
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RAM (rwx) : ORIGIN = 0x20001B00 + (0x0B00 + 0x1280), LENGTH = 0xE500 - (0x0B00 + 0x1280)
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/* ATTR SIZE = 0x0B00, (central, prph, sec) = (7, 1, 1) */
23-
/* RAM (rwx) : ORIGIN = 0x20001B00 + 0x0B00 + 0x1F08, LENGTH = 0xE500 - 0x0B00 - 0x1F08 */
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/* RAM (rwx) : ORIGIN = 0x20001B00 + (0x0B00 + 0x1F08), LENGTH = 0xE500 - (0x0B00 + 0x1F08) */
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}
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SECTIONS

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