Skip to content

Commit 9b3cace

Browse files
orrmanyorrmany
committed
Adding support for s340 SD
Adding readme.txt to describe the way to obtain S340 and how to put into the bootloader. Fixing BLEDIS name.
1 parent 64ea299 commit 9b3cace

File tree

8 files changed

+233
-1
lines changed

8 files changed

+233
-1
lines changed

‎.gitignore

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,3 +64,7 @@ bin/
6464
TAGS
6565

6666
.DS_Store
67+
68+
# Ignore S340 SoftDevice due to license restrictions
69+
bootloader/feather_nrf52840_express/feather_nrf52840_express_bootloader-*_s340_6.1.1.*
70+
cores/nRF5/nordic/softdevice/s340_nrf52_6.1.1_API/*

‎Makefile

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,6 +111,11 @@ else ifeq ($(MCU_SUB_VARIANT),nrf52840)
111111
else
112112
$(error Sub Variant $(MCU_SUB_VARIANT) is unknown)
113113
endif
114+
ifdef USE_S340
115+
#if S340 then adjust SD_NAME and MCU
116+
SD_NAME = s340
117+
MCU_FLAGS = -DNRF52840_XXAA -DS340
118+
endif
114119

115120
#------------------------------------------------------------------------------
116121
# SOURCE FILES

‎lib/softdevice/s340_nrf52_6.1.1/readme.txt

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,36 @@
1+
This directory needs to store the v6.1.1 version of the BLE+ANT combinded S340 softdevice headers + the .hex binary.
2+
The way you can get that is described here: https://www.nordicsemi.com/Software-and-tools/Software/S340-ANT
3+
4+
IMPORTANT:
5+
1. you should rename the .hex file to: s340_nrf52_6.1.1_softdevice.hex
6+
2. You should put the S340 library headers under: s340_nrf52_6.1.1_API
7+
8+
That is, your library tree should look like this:
9+
10+
s340_nrf52_6.1.1/
11+
├── s340_nrf52_6.1.1_API
12+
│   └── include
13+
│   ├── ant_error.h
14+
│   ├── ant_interface.h
15+
│   ├── ant_parameters.h
16+
│   ├── ble.h
17+
│   ├── ble_err.h
18+
│   ├── ble_gap.h
19+
│   ├── ble_gatt.h
20+
│   ├── ble_gattc.h
21+
│   ├── ble_gatts.h
22+
│   ├── ble_hci.h
23+
│   ├── ble_l2cap.h
24+
│   ├── ble_ranges.h
25+
│   ├── ble_types.h
26+
│   ├── nrf52
27+
│   │   └── nrf_mbr.h
28+
│   ├── nrf_error.h
29+
│   ├── nrf_error_sdm.h
30+
│   ├── nrf_error_soc.h
31+
│   ├── nrf_nvic.h
32+
│   ├── nrf_sd_def.h
33+
│   ├── nrf_sdm.h
34+
│   ├── nrf_soc.h
35+
│   └── nrf_svc.h
36+
└── s340_nrf52_6.1.1_softdevice.hex

‎src/boards/feather_nrf52840_express_s340/board.h

Lines changed: 79 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,79 @@
1+
/*
2+
* The MIT License (MIT)
3+
*
4+
* Copyright (c) 2018 Ha Thach for Adafruit Industries
5+
* with modification for S340 SD by Gabor Ziegler
6+
*
7+
* Permission is hereby granted, free of charge, to any person obtaining a copy
8+
* of this software and associated documentation files (the "Software"), to deal
9+
* in the Software without restriction, including without limitation the rights
10+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11+
* copies of the Software, and to permit persons to whom the Software is
12+
* furnished to do so, subject to the following conditions:
13+
*
14+
* The above copyright notice and this permission notice shall be included in
15+
* all copies or substantial portions of the Software.
16+
*
17+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23+
* THE SOFTWARE.
24+
*/
25+
26+
#ifndef _FEATHER_NRF52840_S340_H
27+
#define _FEATHER_NRF52840_S340_H
28+
29+
#define _PINNUM(port, pin) ((port)*32 + (pin))
30+
31+
/*------------------------------------------------------------------*/
32+
/* LED
33+
*------------------------------------------------------------------*/
34+
#define LEDS_NUMBER 2
35+
#define LED_PRIMARY_PIN _PINNUM(1, 15)
36+
#define LED_SECONDARY_PIN _PINNUM(1, 10)
37+
#define LED_STATE_ON 1
38+
39+
#define LED_NEOPIXEL _PINNUM(0, 16)
40+
#define NEOPIXELS_NUMBER 1
41+
#define BOARD_RGB_BRIGHTNESS 0x040404
42+
43+
/*------------------------------------------------------------------*/
44+
/* BUTTON
45+
*------------------------------------------------------------------*/
46+
#define BUTTONS_NUMBER 2
47+
#define BUTTON_1 _PINNUM(1, 02)
48+
#define BUTTON_2 _PINNUM(0, 10)
49+
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
50+
51+
/*------------------------------------------------------------------*/
52+
/* UART (only used by nRF52832)
53+
*------------------------------------------------------------------*/
54+
#define RX_PIN_NUMBER 8
55+
#define TX_PIN_NUMBER 6
56+
#define CTS_PIN_NUMBER 0
57+
#define RTS_PIN_NUMBER 0
58+
#define HWFC false
59+
60+
//--------------------------------------------------------------------+
61+
// BLE OTA
62+
//--------------------------------------------------------------------+
63+
#define BLEDIS_MANUFACTURER "Adafruit Industries"
64+
#define BLEDIS_MODEL "Feather nRF52840 Express S340"
65+
66+
//--------------------------------------------------------------------+
67+
// USB
68+
//--------------------------------------------------------------------+
69+
#define USB_DESC_VID 0x239A
70+
#define USB_DESC_UF2_PID 0x0029
71+
#define USB_DESC_CDC_ONLY_PID 0x002A
72+
73+
//------------- UF2 -------------//
74+
#define UF2_PRODUCT_NAME "Adafruit Feather nRF52840 Express S340"
75+
#define UF2_VOLUME_LABEL "FTHR840BOOT"
76+
#define UF2_BOARD_ID "nRF52840-Feather-revD"
77+
#define UF2_INDEX_URL "https://www.adafruit.com/product/4062"
78+
79+
#endif // _FEATHER_NRF52840_S340_H

‎src/boards/feather_nrf52840_express_s340/board.mk

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
MCU_SUB_VARIANT = nrf52840
2+
USE_S340 = true

‎src/linker/nrf52840_s340_v6.ld

Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,98 @@
1+
/* Linker script to configure memory regions. */
2+
3+
SEARCH_DIR(.)
4+
GROUP(-lgcc -lc -lnosys)
5+
6+
MEMORY
7+
{
8+
/** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
9+
* MBR to init the bootloader when starting the system. This value must correspond to
10+
* BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
11+
* those values do not match. The check is performed in main.c, see
12+
* APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
13+
*/
14+
FLASH (rx) : ORIGIN = 0xF4000, LENGTH = 0xFE000-0xF4000-2048 /* 38 KB */
15+
16+
BOOTLOADER_CONFIG (r): ORIGIN = 0xFE000 - 2048, LENGTH = 2048
17+
18+
/** Location of mbr params page in flash. */
19+
MBR_PARAMS_PAGE (rw) : ORIGIN = 0xFE000, LENGTH = 0x1000
20+
21+
/** Location of bootloader setting in flash. */
22+
BOOTLOADER_SETTINGS (rw) : ORIGIN = 0xFF000, LENGTH = 0x1000
23+
24+
25+
26+
/** RAM Region for bootloader. */
27+
/* Avoid conflict with NOINIT for OTA bond sharing */
28+
RAM (rwx) : ORIGIN = 0x20008000, LENGTH = 0x20040000-0x20008000
29+
30+
/* Location for double reset detection, no init */
31+
DBL_RESET (rwx) : ORIGIN = 0x20007F7C, LENGTH = 0x04
32+
33+
/** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
34+
* from application to bootloader when using buttonluss DFU OTA. */
35+
NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
36+
37+
38+
39+
/** Location in UICR where bootloader start address is stored. */
40+
UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
41+
42+
/** Location in UICR where mbr params page address is stored. */
43+
UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
44+
}
45+
46+
SECTIONS
47+
{
48+
.fs_data_out ALIGN(4):
49+
{
50+
PROVIDE( __start_fs_data = .);
51+
KEEP(*(fs_data))
52+
PROVIDE( __stop_fs_data = .);
53+
} = 0
54+
55+
.bootloaderConfig :
56+
{
57+
KEEP(*(.bootloaderConfig))
58+
} > BOOTLOADER_CONFIG
59+
60+
/* Place the bootloader settings page in flash. */
61+
.bootloaderSettings(NOLOAD) :
62+
{
63+
64+
} > BOOTLOADER_SETTINGS
65+
66+
/* Write the bootloader address in UICR. */
67+
.uicrBootStartAddress :
68+
{
69+
KEEP(*(.uicrBootStartAddress))
70+
} > UICR_BOOTLOADER
71+
72+
/* Place the mbr params page in flash. */
73+
.mbrParamsPage(NOLOAD) :
74+
{
75+
76+
} > MBR_PARAMS_PAGE
77+
78+
/* Write the bootloader address in UICR. */
79+
.uicrMbrParamsPageAddress :
80+
{
81+
KEEP(*(.uicrMbrParamsPageAddress))
82+
} > UICR_MBR_PARAM_PAGE
83+
84+
.dbl_reset(NOLOAD) :
85+
{
86+
87+
} > DBL_RESET
88+
89+
/* No init RAM section in bootloader. Used for bond information exchange. */
90+
.noinit(NOLOAD) :
91+
{
92+
93+
} > NOINIT
94+
95+
/* other placements follow here... */
96+
}
97+
98+
INCLUDE "nrf_common.ld"

‎src/main.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,7 +328,12 @@ static uint32_t softdev_init(bool init_softdevice)
328328
.accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM
329329
};
330330

331+
#ifndef ANT_LICENSE_KEY
331332
APP_ERROR_CHECK( sd_softdevice_enable(&clock_cfg, app_error_fault_handler) );
333+
#else
334+
APP_ERROR_CHECK( sd_softdevice_enable(&clock_cfg, app_error_fault_handler, ANT_LICENSE_KEY) );
335+
#endif
336+
332337
sd_nvic_EnableIRQ(SD_EVT_IRQn);
333338

334339
/*------------- Configure BLE params -------------*/

‎src/usb/uf2/uf2cfg.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,15 +9,18 @@
99
#define CFG_UF2_BOARD_APP_ID ((USB_DESC_VID << 16) | USB_DESC_UF2_PID)
1010
#endif
1111

12-
1312
// Family ID for updating Bootloader
1413
#define CFG_UF2_FAMILY_BOOT_ID 0xd663823c
1514

1615
#define CFG_UF2_NUM_BLOCKS 0x10109 // just under 32MB
1716
#define CFG_UF2_FLASH_SIZE (1024*1024) // 1 MB
1817

1918
// Application Address Space
19+
#ifdef S340 //S340 uses more flash
20+
#define USER_FLASH_START MBR_SIZE+0xB000
21+
#else
2022
#define USER_FLASH_START MBR_SIZE // skip MBR included in SD hex
23+
#endif
2124
#define USER_FLASH_END 0xAD000
2225

2326
// Bootloader start address

0 commit comments

Comments
 (0)