@@ -214,7 +214,7 @@ static inline void tft_dc(bool state) {
214214 }
215215}
216216
217- static void tft_cmd (uint8_t cmd , uint8_t const * data , uint8_t narg ) {
217+ static void tft_cmd (uint8_t cmd , uint8_t const * data , size_t narg ) {
218218 tft_cs (false);
219219
220220 // send command
@@ -269,34 +269,20 @@ void board_display_teardown(void) {
269269 nrf_spim_disable (_spim );
270270}
271271
272- // Send the whole buffer data to display controller
273- extern const uint16_t color_palette [];
274- void board_display_draw_screen (uint8_t const * fb ) {
272+ void board_display_draw_line (uint16_t y , uint8_t const * buf , size_t nbytes ) {
273+ // column and row address set
274+ uint32_t xa32 = DISPLAY_COL_OFFSET << 16 | DISPLAY_WIDTH ;
275+ xa32 = __builtin_bswap32 (xa32 );
275276
276- tft_cs (false);
277-
278- // command: memory write
279- uint8_t cmd = 0x2C ;
280- tft_dc (false);
281- spi_write (_spim , & cmd , 1 );
277+ y += DISPLAY_ROW_OFFSET ;
278+ uint32_t ya32 = (y << 16 ) | (y + 1 );
279+ ya32 = __builtin_bswap32 (ya32 );
282280
283- // data
284- tft_dc (true);
285-
286- uint8_t const * p = fb ;
287- for (int i = 0 ; i < DISPLAY_WIDTH ; ++ i ) {
288- uint8_t cc [DISPLAY_HEIGHT * 2 ];
289- uint32_t dst = 0 ;
290- for (int j = 0 ; j < DISPLAY_HEIGHT ; ++ j ) {
291- uint16_t color = color_palette [* p ++ & 0xf ];
292- cc [dst ++ ] = color >> 8 ;
293- cc [dst ++ ] = color & 0xff ;
294- }
281+ tft_cmd (0x2A , (uint8_t * ) & xa32 , 4 );
282+ tft_cmd (0x2B , (uint8_t * ) & ya32 , 4 );
295283
296- spi_write (_spim , cc , sizeof (cc ));
297- }
298-
299- tft_cs (true);
284+ // command: memory write
285+ tft_cmd (0x2C , buf , nbytes );
300286}
301287
302288#endif
@@ -681,6 +667,14 @@ void neopixel_write (uint8_t *pixels) {
681667}
682668#endif
683669
670+ #define TFT_MADCTL_MY 0x80 ///< Page addr order: Bottom to top
671+ #define TFT_MADCTL_MX 0x40 ///< Column addr order: Right to left
672+ #define TFT_MADCTL_MV 0x20 ///< Page/Column order: Reverse Mode ( X <-> Y )
673+ #define TFT_MADCTL_ML 0x10 ///< LCD refresh Bottom to top
674+ #define TFT_MADCTL_MH 0x04 ///< LCD refresh right to left
675+ #define TFT_MADCTL_RGB 0x00 ///< Red-Green-Blue pixel order
676+ #define TFT_MADCTL_BGR 0x08 ///< Blue-Green-Red pixel order
677+
684678#ifdef DISPLAY_CONTROLLER_ST7789
685679
686680#define ST_CMD_DELAY 0x80 // special signifier for command lists
@@ -742,7 +736,7 @@ static void tft_controller_init(void) {
742736 // 3: Set color mode, 1 arg + delay: 16-bit color, 10 ms delay
743737 ST77XX_COLMOD , 1 + ST_CMD_DELAY , 0x55 , 10 ,
744738 // 4: Mem access ctrl (directions), 1 arg: Row/col addr, bottom-top refresh
745- ST77XX_MADCTL , 1 , 0x08 ,
739+ ST77XX_MADCTL , 1 , DISPLAY_MADCTL ,
746740 // 5: Column addr set, 4 args, no delay: XSTART = 0, XEND = 240
747741 ST77XX_CASET , 4 , 0x00 , 0 , 0 , 240 ,
748742 // 6: Row addr set, 4 args, no delay: YSTART = 0 YEND = 320
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