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Adding support for s340 SD
Adding readme.txt to describe the way to obtain S340 and how to put into the bootloader. Fixing BLEDIS name.
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‎.gitignore

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*.jlink
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TAGS
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.DS_Store
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# Ignore S340 SoftDevice due to license restrictions
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bootloader/feather_nrf52840_express/feather_nrf52840_express_bootloader-*_s340_6.1.1.*
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cores/nRF5/nordic/softdevice/s340_nrf52_6.1.1_API/*

‎Makefile

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@@ -110,6 +110,11 @@ else ifeq ($(MCU_SUB_VARIANT),nrf52840)
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else
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$(error Sub Variant $(MCU_SUB_VARIANT) is unknown)
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endif
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ifdef USE_S340
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#if S340 then adjust SD_NAME and MCU
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SD_NAME = s340
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MCU_FLAGS = -DNRF52840_XXAA -DS340
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endif
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#******************************************************************************
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# SOURCE FILES

‎lib/softdevice/s340_nrf52_6.1.1/readme.txt

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This directory needs to store the v6.1.1 version of the BLE+ANT combinded S340 softdevice headers + the .hex binary.
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The way you can get that is described here: https://www.nordicsemi.com/Software-and-tools/Software/S340-ANT
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IMPORTANT:
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1. you should rename the .hex file to: s340_nrf52_6.1.1_softdevice.hex
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2. You should put the S340 library headers under: s340_nrf52_6.1.1_API
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That is, your library tree should look like this:
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s340_nrf52_6.1.1/
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├── s340_nrf52_6.1.1_API
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│   └── include
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│   ├── ant_error.h
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│   ├── ant_interface.h
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│   ├── ant_parameters.h
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│   ├── ble.h
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│   ├── ble_err.h
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│   ├── ble_gap.h
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│   ├── ble_gatt.h
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│   ├── ble_gattc.h
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│   ├── ble_gatts.h
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│   ├── ble_hci.h
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│   ├── ble_l2cap.h
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│   ├── ble_ranges.h
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│   ├── ble_types.h
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│   ├── nrf52
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│   │   └── nrf_mbr.h
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│   ├── nrf_error.h
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│   ├── nrf_error_sdm.h
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│   ├── nrf_error_soc.h
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│   ├── nrf_nvic.h
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│   ├── nrf_sd_def.h
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│   ├── nrf_sdm.h
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│   ├── nrf_soc.h
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│   └── nrf_svc.h
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└── s340_nrf52_6.1.1_softdevice.hex

‎src/boards/feather_nrf52840_express_s340/board.h

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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Ha Thach for Adafruit Industries
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* with modification for S340 SD by Gabor Ziegler
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef _FEATHER_NRF52840_S340_H
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#define _FEATHER_NRF52840_S340_H
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#define _PINNUM(port, pin) ((port)*32 + (pin))
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/*------------------------------------------------------------------*/
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/* LED
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*------------------------------------------------------------------*/
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#define LEDS_NUMBER 2
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#define LED_PRIMARY_PIN _PINNUM(1, 15)
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#define LED_SECONDARY_PIN _PINNUM(1, 10)
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#define LED_STATE_ON 1
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#define LED_NEOPIXEL _PINNUM(0, 16)
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#define NEOPIXELS_NUMBER 1
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#define BOARD_RGB_BRIGHTNESS 0x040404
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/*------------------------------------------------------------------*/
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/* BUTTON
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*------------------------------------------------------------------*/
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#define BUTTONS_NUMBER 2
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#define BUTTON_1 _PINNUM(1, 02)
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#define BUTTON_2 _PINNUM(0, 10)
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#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
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/*------------------------------------------------------------------*/
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/* UART (only used by nRF52832)
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*------------------------------------------------------------------*/
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#define RX_PIN_NUMBER 8
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#define TX_PIN_NUMBER 6
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#define CTS_PIN_NUMBER 0
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#define RTS_PIN_NUMBER 0
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#define HWFC false
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//--------------------------------------------------------------------+
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// BLE OTA
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//--------------------------------------------------------------------+
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#define BLEDIS_MANUFACTURER "Adafruit Industries"
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#define BLEDIS_MODEL "Feather nRF52840 Express S340"
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//--------------------------------------------------------------------+
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// USB
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//--------------------------------------------------------------------+
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#define USB_DESC_VID 0x239A
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#define USB_DESC_UF2_PID 0x0029
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#define USB_DESC_CDC_ONLY_PID 0x002A
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//------------- UF2 -------------//
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#define UF2_PRODUCT_NAME "Adafruit Feather nRF52840 Express S340"
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#define UF2_VOLUME_LABEL "FTHR840BOOT"
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#define UF2_BOARD_ID "nRF52840-Feather-revD"
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#define UF2_INDEX_URL "https://www.adafruit.com/product/4062"
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#endif // _FEATHER_NRF52840_S340_H

‎src/boards/feather_nrf52840_express_s340/board.mk

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MCU_SUB_VARIANT = nrf52840
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USE_S340 = true

‎src/linker/nrf52840_s340_v6.ld

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/* Linker script to configure memory regions. */
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SEARCH_DIR(.)
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GROUP(-lgcc -lc -lnosys)
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MEMORY
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{
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/** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
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* MBR to init the bootloader when starting the system. This value must correspond to
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* BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
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* those values do not match. The check is performed in main.c, see
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* APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
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*/
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FLASH (rx) : ORIGIN = 0xF4000, LENGTH = 0xFE000-0xF4000-2048 /* 38 KB */
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BOOTLOADER_CONFIG (r): ORIGIN = 0xFE000 - 2048, LENGTH = 2048
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/** Location of mbr params page in flash. */
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MBR_PARAMS_PAGE (rw) : ORIGIN = 0xFE000, LENGTH = 0x1000
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/** Location of bootloader setting in flash. */
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BOOTLOADER_SETTINGS (rw) : ORIGIN = 0xFF000, LENGTH = 0x1000
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/** RAM Region for bootloader. */
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/* Avoid conflict with NOINIT for OTA bond sharing */
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RAM (rwx) : ORIGIN = 0x20008000, LENGTH = 0x20040000-0x20008000
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/* Location for double reset detection, no init */
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DBL_RESET (rwx) : ORIGIN = 0x20007F7C, LENGTH = 0x04
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/** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
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* from application to bootloader when using buttonluss DFU OTA. */
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NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
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/** Location in UICR where bootloader start address is stored. */
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UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
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/** Location in UICR where mbr params page address is stored. */
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UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
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}
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SECTIONS
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{
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.fs_data_out ALIGN(4):
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{
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PROVIDE( __start_fs_data = .);
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KEEP(*(fs_data))
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PROVIDE( __stop_fs_data = .);
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} = 0
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.bootloaderConfig :
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{
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KEEP(*(.bootloaderConfig))
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} > BOOTLOADER_CONFIG
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/* Place the bootloader settings page in flash. */
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.bootloaderSettings(NOLOAD) :
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{
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} > BOOTLOADER_SETTINGS
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/* Write the bootloader address in UICR. */
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.uicrBootStartAddress :
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{
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KEEP(*(.uicrBootStartAddress))
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} > UICR_BOOTLOADER
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/* Place the mbr params page in flash. */
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.mbrParamsPage(NOLOAD) :
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{
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} > MBR_PARAMS_PAGE
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/* Write the bootloader address in UICR. */
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.uicrMbrParamsPageAddress :
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{
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KEEP(*(.uicrMbrParamsPageAddress))
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} > UICR_MBR_PARAM_PAGE
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.dbl_reset(NOLOAD) :
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{
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} > DBL_RESET
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/* No init RAM section in bootloader. Used for bond information exchange. */
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.noinit(NOLOAD) :
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{
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} > NOINIT
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/* other placements follow here... */
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}
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INCLUDE "nrf_common.ld"

‎src/main.c

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.accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM
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};
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#ifndef ANT_LICENSE_KEY
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APP_ERROR_CHECK( sd_softdevice_enable(&clock_cfg, app_error_fault_handler) );
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#else
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APP_ERROR_CHECK( sd_softdevice_enable(&clock_cfg, app_error_fault_handler, ANT_LICENSE_KEY) );
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#endif
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sd_nvic_EnableIRQ(SD_EVT_IRQn);
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/*------------- Configure BLE params -------------*/

‎src/usb/uf2/uf2cfg.h

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#define FLASH_SIZE (USER_FLASH_END-USER_FLASH_START) // Max flash size
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// Only allow to write application TODO dynamic depending on SD size
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#ifdef S340 //S340 uses more flash
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#define USER_FLASH_START 0x31000
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#else
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#define USER_FLASH_START 0x26000
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#endif
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#define USER_FLASH_END 0xAD000 // Fat Fs start here
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#define FLASH_PAGE_SIZE 4096

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