Commit dfcdcb6
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increase default ADC conversion rate; update example
Increased the default ADC conversion rate from 10 to 20 samples per second to eliminate a racing error where the conversion completion (Cycle Ready) flag wasn't consistently set. The error made it appear that the ADC data wasn't available. Successfully tested conversion rates up to 320 sps. Note: high sample rates are inherently less accurate but may be useful for some applications.
Fixed an error in the simpletest example was causing the example to continuously read the ADC data, ignoring the conversion completion (Cycle Ready) flag.
Both changes are expected to be transparent to all existing applications.1 parent 154d219 commit dfcdcb6
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