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Commit 2ff038f

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fixing c formatting
1 parent 6a8b4f5 commit 2ff038f

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+8
-4
lines changed

1 file changed

+8
-4
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ports/atmel-samd/common-hal/alarm/__init__.c

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,9 @@ mp_obj_t common_hal_alarm_light_sleep_until_alarms(size_t n_alarms, const mp_obj
153153
PM->STDBYCFG.reg = PM_STDBYCFG_RAMCFG_OFF;
154154
// Set-up Sleep Mode
155155
PM->SLEEPCFG.reg = PM_SLEEPCFG_SLEEPMODE_STANDBY;
156-
while(PM->SLEEPCFG.bit.SLEEPMODE != PM_SLEEPCFG_SLEEPMODE_STANDBY_Val);
156+
while(PM->SLEEPCFG.bit.SLEEPMODE != PM_SLEEPCFG_SLEEPMODE_STANDBY_Val) {
157+
;
158+
}
157159

158160
__DSB(); // Data Synchronization Barrier
159161
__WFI(); // Wait For Interrupt
@@ -246,7 +248,7 @@ void NORETURN common_hal_alarm_enter_deep_sleep(void) {
246248
NVIC_EnableIRQ(RTC_IRQn);
247249
// Set interrupts for COMPARE1 or overflow
248250
RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP1 | RTC_MODE1_INTENSET_OVF;
249-
}
251+
}
250252
// Set-up Deep Sleep Mode
251253
// RAM retention
252254
PM->BKUPCFG.reg = PM_BKUPCFG_BRAMCFG(0x2); // No RAM retention 0x2 partial:0x1
@@ -259,7 +261,9 @@ void NORETURN common_hal_alarm_enter_deep_sleep(void) {
259261
}
260262

261263
RTC->MODE0.CTRLA.bit.ENABLE = 1; // Enable the RTC
262-
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization
264+
while (RTC->MODE0.SYNCBUSY.bit.ENABLE) { // Wait for synchronization
265+
;
266+
}
263267

264268
__DSB(); // Data Synchronization Barrier
265269
__WFI(); // Wait For Interrupt
@@ -278,7 +282,7 @@ MP_NOINLINE void common_hal_alarm_pretending_deep_sleep(void) {
278282

279283
if (!fake_sleep) {
280284
SAMD_ALARM_FLAG = 1;
281-
while(RTC->MODE0.SYNCBUSY.reg) {
285+
while (RTC->MODE0.SYNCBUSY.reg) {
282286
;
283287
}
284288
fake_sleep = true;

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