Merge remote-tracking branch 'origin/master' into jerryn_tick

Author: jerryneedell

.travis.yml

@@ -16,7 +16,6 @@ env:
   - TRAVIS_BOARD=itsybitsy_m4_express
   - TRAVIS_BOARD=metro_m0_express
   - TRAVIS_BOARD=metro_m4_express
-  - TRAVIS_BOARD=metro_m4_express_revb
   - TRAVIS_BOARD=pirkey_m0
   - TRAVIS_BOARD=trinket_m0
   - TRAVIS_BOARD=gemma_m0

ports/atmel-samd/Makefile

@@ -39,6 +39,7 @@ INC += -I. \
        -Iasf4/$(CHIP_FAMILY)/hpl/gclk \
        -Iasf4/$(CHIP_FAMILY)/hpl/pm \
        -Iasf4/$(CHIP_FAMILY)/hpl/port \
+       -Iasf4/$(CHIP_FAMILY)/hpl/rtc \
        -Iasf4/$(CHIP_FAMILY)/hpl/tc \
        -Iasf4/$(CHIP_FAMILY)/include \
        -Iasf4/$(CHIP_FAMILY)/CMSIS/Include \
@@ -173,6 +174,7 @@ SRC_ASF := \
 	gcc/system_$(CHIP_FAMILY).c \
 	hal/src/hal_adc_sync.c \
 	hal/src/hal_atomic.c \
+	hal/src/hal_calendar.c \
 	hal/src/hal_dac_sync.c \
 	hal/src/hal_delay.c \
 	hal/src/hal_flash.c \
@@ -278,13 +280,17 @@ SRC_COMMON_HAL = \
 	microcontroller/Processor.c \
 	neopixel_write/__init__.c \
 	os/__init__.c \
+	rtc/__init__.c \
+	rtc/RTC.c \
 	storage/__init__.c \
 	supervisor/__init__.c \
 	supervisor/Runtime.c \
 	time/__init__.c \
 	analogio/__init__.c \
 	analogio/AnalogIn.c \
 	analogio/AnalogOut.c \
+	nvm/__init__.c \
+	nvm/ByteArray.c \
 	pulseio/__init__.c \
 	pulseio/PulseIn.c \
 	pulseio/PulseOut.c \
@@ -293,9 +299,7 @@ SRC_COMMON_HAL = \
 	usb_hid/Device.c \
 	audioio/__init__.c \
 	audioio/AudioOut.c \
-#	nvm/__init__.c \
-	audiobusio/PDMIn.c \
-	nvm/ByteArray.c \
+#	audiobusio/PDMIn.c \
 	touchio/__init__.c \
 	touchio/TouchIn.c \
 

ports/atmel-samd/asf4

@@ -190,7 +190,7 @@
 // <i> Indicates whether generic clock 2 configuration is enabled or not
 // <id> enable_gclk_gen_2
 #ifndef CONF_GCLK_GENERATOR_2_CONFIG
-#define CONF_GCLK_GENERATOR_2_CONFIG 0
+#define CONF_GCLK_GENERATOR_2_CONFIG 1
 #endif
 
 // <h> Generic Clock Generator Control
@@ -205,7 +205,7 @@
 // <i> Indicates whether Divide Selection is enabled or not
 // <id> gclk_gen_2_div_sel
 #ifndef CONF_GCLK_GEN_2_DIVSEL
-#define CONF_GCLK_GEN_2_DIVSEL 0
+#define CONF_GCLK_GEN_2_DIVSEL 1
 #endif
 
 // <q> Output Enable
@@ -233,7 +233,7 @@
 // <i> Indicates whether Generic Clock Generator Enable is enabled or not
 // <id> gclk_arch_gen_2_enable
 #ifndef CONF_GCLK_GEN_2_GENEN
-#define CONF_GCLK_GEN_2_GENEN 0
+#define CONF_GCLK_GEN_2_GENEN 1
 #endif
 
 // <y> Generic clock generator 2 source
@@ -268,7 +268,7 @@
 // <i>
 // <id> gclk_gen_2_div
 #ifndef CONF_GCLK_GEN_2_DIV
-#define CONF_GCLK_GEN_2_DIV 1
+#define CONF_GCLK_GEN_2_DIV 4
 #endif
 
 // </h>

ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h

@@ -10,6 +10,14 @@
 #define CONF_RTC_ENABLE 1
 #endif
 
+// <q> Force reset RTC on initialization
+// <i> Force RTC to reset on initialization, else init is not going on if RTC is already enabled.
+// <i> Note that the previous power down data in RTC is lost if it's enabled.
+// <id> rtc_arch_init_reset
+#ifndef CONF_RTC_INIT_RESET
+#define CONF_RTC_INIT_RESET 0
+#endif
+
 // <o> Prescaler configuration
 // <0x0=>Peripheral clock divided by 1
 // <0x1=>Peripheral clock divided by 2
@@ -25,7 +33,7 @@
 // <i> These bits define the RTC clock relative to the peripheral clock
 // <id> rtc_arch_prescaler
 #ifndef CONF_RTC_PRESCALER
-#define CONF_RTC_PRESCALER 0x0
+#define CONF_RTC_PRESCALER 0xa
 
 #endif
 

ports/atmel-samd/asf4_conf/samd21/hpl_rtc_config.h

@@ -274,7 +274,7 @@
 // <i> Default: 122 us
 // <id> xosc32k_arch_startup
 #ifndef CONF_XOSC32K_STARTUP
-#define CONF_XOSC32K_STARTUP CONF_XOSC32K_STARTUP_TIME_122MCS
+#define CONF_XOSC32K_STARTUP CONF_XOSC32K_STARTUP_TIME_2000092MCS
 #endif
 
 // </h>

ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h

@@ -321,7 +321,7 @@
 
 // <i> Select the clock source for RTC.
 #ifndef CONF_GCLK_RTC_SRC
-#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
+#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK2_Val
 #endif
 
 /**

ports/atmel-samd/asf4_conf/samd21/peripheral_clk_config.h

@@ -172,7 +172,7 @@
 // <i> Indicates whether generic clock 2 configuration is enabled or not
 // <id> enable_gclk_gen_2
 #ifndef CONF_GCLK_GENERATOR_2_CONFIG
-#define CONF_GCLK_GENERATOR_2_CONFIG 0
+#define CONF_GCLK_GENERATOR_2_CONFIG 1
 #endif
 
 // <h> Generic Clock Generator Control
@@ -188,7 +188,7 @@
 // <i> This defines the clock source for generic clock generator 2
 // <id> gclk_gen_2_oscillator
 #ifndef CONF_GCLK_GEN_2_SOURCE
-#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_XOSC1
+#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_OSCULP32K
 #endif
 
 // <q> Run in Standby
@@ -230,15 +230,15 @@
 // <i> Indicates whether Generic Clock Generator Enable is enabled or not
 // <id> gclk_arch_gen_2_enable
 #ifndef CONF_GCLK_GEN_2_GENEN
-#define CONF_GCLK_GEN_2_GENEN 0
+#define CONF_GCLK_GEN_2_GENEN 1
 #endif
 // </h>
 
 //<h> Generic Clock Generator Division
 //<o> Generic clock generator 2 division <0x0000-0xFFFF>
 // <id> gclk_gen_2_div
 #ifndef CONF_GCLK_GEN_2_DIV
-#define CONF_GCLK_GEN_2_DIV 1
+#define CONF_GCLK_GEN_2_DIV 4
 #endif
 // </h>
 // </e>

ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h

@@ -10,6 +10,14 @@
 #define CONF_RTC_ENABLE 1
 #endif
 
+// <q> Force reset RTC on initialization
+// <i> Force RTC to reset on initialization.
+// <i> Note that the previous power down data in RTC is lost if it's enabled.
+// <id> rtc_arch_init_reset
+#ifndef CONF_RTC_INIT_RESET
+#define CONF_RTC_INIT_RESET 0
+#endif
+
 // <o> Prescaler configuration
 // <0x0=>OFF(Peripheral clock divided by 1)
 // <0x1=>Peripheral clock divided by 1
@@ -26,7 +34,7 @@
 // <i> These bits define the RTC clock relative to the peripheral clock
 // <id> rtc_arch_prescaler
 #ifndef CONF_RTC_PRESCALER
-#define CONF_RTC_PRESCALER 0x0
+#define CONF_RTC_PRESCALER 0xb
 
 #endif
 

ports/atmel-samd/asf4_conf/samd51/hpl_rtc_config.h

@@ -42,8 +42,7 @@
 
 // If you change this, then make sure to update the linker scripts as well to
 // make sure you don't overwrite code.
-// #define CIRCUITPY_INTERNAL_NVM_SIZE 256
-#define CIRCUITPY_INTERNAL_NVM_SIZE 0
+#define CIRCUITPY_INTERNAL_NVM_SIZE 256
 
 #define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE)