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durapensadurapensa
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Initial try at Lolin S2 Mini board definition
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‎ports/esp32s2/boards/lolin_s2_mini/ai_pins.c

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#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
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// S2 Mini Board bottom, right, top-bottom
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// GPIO0-GPIO14: broken out as a bloc on ESP32-S2FN4R2 SoC
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// mpconfigboard.h: GPIO0: CIRCUITPY_BOOT_BUTTON
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{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO0) }, // EN
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// mpconfigboard.h: GPIO1: MICROPY_HW_NEOPIXEL
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{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, // RTC_GPIO1,GPIO1,TOUCH1,ADC1_CH0
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{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) }, // RTC_GPIO2,GPIO2,TOUCH2,ADC1_CH1
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{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, // RTC_GPIO3,GPIO3,TOUCH3,ADC1_CH2
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{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, // RTC_GPIO4,GPIO4,TOUCH4,ADC1_CH3
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{ MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO4) }
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{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, // RTC_GPIO5,GPIO5,TOUCH5,ADC1_CH4
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{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, // RTC_GPIO6,GPIO6,TOUCH6,ADC1_CH5
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{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, // RTC_GPIO7,GPIO7,TOUCH7,ADC1_CH6
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{ MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO7) },
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// mpconfigboard.h: GPIO8/GPIO9: SCL/SDA I2C0
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{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, // RTC_GPIO8,GPIO8,TOUCH8,ADC1_CH7
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, // RTC_GPIO9,GPIO9,TOUCH9,ADC1_CH8,FSPIHD
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{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },// RTC_GPIO10,GPIO10,TOUCH10,ADC1_CH9,FSPICS0,FSPIIO4
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{ MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },// RTC_GPIO11,GPIO11,TOUCH11,ADC2_CH0,FSPID,FSPIIO5
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{ MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },//RTC_GPIO12,GPIO12,TOUCH12,ADC2_CH1,FSPICLK,FSPIIO6
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{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },//RTC_GPIO13,GPIO13,TOUCH13,ADC2_CH2,FSPIQ,FSPIIO7
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{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },//RTC_GPIO14,GPIO14,TOUCH14,ADC2_CH3,FSPIWP,FSPIDQS
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{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO14) },
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// S2 Mini Board bottom, left, bottom-top
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// mpconfigboard.h: GPIO15: CIRCUITPY_STATUS_LED_POWER
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{ MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },//XTAL_32K_P: RTC_GPIO15,GPIO15,U0RTS,ADC2_CH4,XTAL_32K_P
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{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },//XTAL_32K_N: RTC_GPIO16,GPIO16,U0CTS,ADC2_CH5,XTAL_32K_N
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{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },//DAC_1: RTC_GPIO17,GPIO17,U1TXD,ADC2_CH6,DAC_1
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{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },//DAC_2: RTC_GPIO18,GPIO18,U1RXD,ADC2_CH7,DAC_2,CLK_OUT3
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{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_GPIO18) },
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// skip GPIO19-GPIO20: USB_D-/USB_D+
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{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },// RTC_GPIO21,GPIO21
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// skip GPIO22-GPIO25: not broken out on ESP32-S2FN4R2 SoC
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// skip GPIO26-GPIO32: SPI, not broken on on S2 Mini
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// GPIO33-GPIO40: broken out as a bloc on ESP32-S2FN4R2 SoC, last 2 half of JTAG
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{ MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },// SPIIO4,GPIO33,FSPIHD
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{ MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },// SPIIO5,GPIO34,FSPICS0
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// mpconfigboard.h: GPIO35/GPIO36/GPIO37: SCK/MOSI/MISO SPI
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{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },// SPIIO6,GPIO35,FSPID
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{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_SDO), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },// SPIIO7,GPIO36,FSPICLK
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{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_SDI), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },// SPIDQS,GPIO37,FSPIQ
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{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },// GPIO38,FSPIWP
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{ MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },// MTCK,GPIO39,CLK_OUT3
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{ MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },// MTDO,GPIO40,CLK_OUT2
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// S2 Mini - not broken out on board
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{ MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },// MTDI,GPIO41,CLK_OUT1
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{ MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },// MTMS,GPIO42
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, // U0TXD,GPIO43,CLK_OUT1
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{ MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },//
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, // U0RXD,GPIO44,CLK_OUT2
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{ MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },// GPIO45
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{ MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },// GPIO46
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// { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

‎ports/esp32s2/boards/lolin_s2_mini/board.c

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "supervisor/board.h"
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#include "mpconfigboard.h"
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#include "shared-bindings/microcontroller/Pin.h"
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void board_init(void) {
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// USB
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common_hal_never_reset_pin(&pin_GPIO19);
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common_hal_never_reset_pin(&pin_GPIO20);
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// Debug UART
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#ifdef DEBUG
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common_hal_never_reset_pin(&pin_GPIO43);
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common_hal_never_reset_pin(&pin_GPIO44);
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#endif /* DEBUG */
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// SPI Flash and RAM
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common_hal_never_reset_pin(&pin_GPIO26);
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common_hal_never_reset_pin(&pin_GPIO27);
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common_hal_never_reset_pin(&pin_GPIO28);
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common_hal_never_reset_pin(&pin_GPIO29);
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common_hal_never_reset_pin(&pin_GPIO30);
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common_hal_never_reset_pin(&pin_GPIO31);
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common_hal_never_reset_pin(&pin_GPIO32);
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}
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bool board_requests_safe_mode(void) {
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return false;
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}
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void reset_board(void) {
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}
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void board_deinit(void) {
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}

‎ports/esp32s2/boards/lolin_s2_mini/mpconfigboard.h

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// Micropython setup
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#define MICROPY_HW_BOARD_NAME "S2Mini"
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#define MICROPY_HW_MCU_NAME "ESP32S2"
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#define MICROPY_HW_NEOPIXEL (&pin_GPIO1)
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#define CIRCUITPY_STATUS_LED_POWER (&pin_GPIO15)
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#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
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#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
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#define AUTORESET_DELAY_MS 500
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#define DEFAULT_I2C_BUS_SCL (&pin_GPIO9)
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#define DEFAULT_I2C_BUS_SDA (&pin_GPIO8)
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#define DEFAULT_SPI_BUS_SCK (&pin_GPIO37)
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#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35)
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#define DEFAULT_SPI_BUS_MISO (&pin_GPIO36)
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#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
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#define DEFAULT_UART_BUS_TX (&pin_GPIO43)

‎ports/esp32s2/boards/lolin_s2_mini/mpconfigboard.mk

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USB_VID = 0x303A
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USB_PID = 0x8002
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USB_PRODUCT = "S2Mini"
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USB_MANUFACTURER = "Lolin"
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INTERNAL_FLASH_FILESYSTEM = 1
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LONGINT_IMPL = MPZ
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# The default queue depth of 16 overflows on release builds,
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# so increase it to 32.
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CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
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CIRCUITPY_ESP_FLASH_MODE=qio
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CIRCUITPY_ESP_FLASH_FREQ=80m
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CIRCUITPY_ESP_FLASH_SIZE=4MB
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CIRCUITPY_BITBANG_NEOPIXEL = 1
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# Include these Python libraries in firmware.
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FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel

‎ports/esp32s2/boards/lolin_s2_mini/pins.c

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#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_SDO), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_SDI), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
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{ MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) },
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{ MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

‎ports/esp32s2/boards/lolin_s2_mini/sdkconfig

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CONFIG_ESP32S2_SPIRAM_SUPPORT=y
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#
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# SPI RAM config
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#
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# CONFIG_SPIRAM_TYPE_AUTO=y
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CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
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# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM64=y
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CONFIG_SPIRAM_SIZE=2097152
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#
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# PSRAM clock and cs IO for ESP32S2
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#
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CONFIG_DEFAULT_PSRAM_CLK_IO=30
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CONFIG_DEFAULT_PSRAM_CS_IO=26
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# end of PSRAM clock and cs IO for ESP32S2
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# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
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# CONFIG_SPIRAM_RODATA is not set
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# CONFIG_SPIRAM_SPEED_80M=y
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CONFIG_SPIRAM_SPEED_40M=y
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# CONFIG_SPIRAM_SPEED_26M is not set
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# CONFIG_SPIRAM_SPEED_20M is not set
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_BOOT_INIT=y
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# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
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CONFIG_SPIRAM_USE_MEMMAP=y
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# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
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# CONFIG_SPIRAM_USE_MALLOC is not set
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CONFIG_SPIRAM_MEMTEST=y
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# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
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# end of SPI RAM config
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#
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# LWIP
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#
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CONFIG_LWIP_LOCAL_HOSTNAME="LS2Mini"
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# end of LWIP

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