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Merge pull request #8016 from charlieh0tel/new-mimxrt1060-evkb-board
Adds MIMXRT1060-EVKB as new board.
2 parents 9040ac8 + 49b1368 commit 5967732

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‎ports/mimxrt10xx/boards/imxrt1060_evkb/board.c

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
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* Copyright (c) 2019 Artur Pacholec
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "supervisor/board.h"
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#include "shared-bindings/microcontroller/Pin.h"
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// These pins should never ever be reset; doing so could interfere with basic operation.
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// Used in common-hal/microcontroller/Pin.c
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const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
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// SWD Pins
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&pin_GPIO_AD_B0_06, // SWDIO
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&pin_GPIO_AD_B0_07, // SWCLK
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// FLEX flash
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&pin_GPIO_SD_B1_00,
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&pin_GPIO_SD_B1_01,
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&pin_GPIO_SD_B1_02,
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&pin_GPIO_SD_B1_03,
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&pin_GPIO_SD_B1_04,
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&pin_GPIO_SD_B1_05,
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&pin_GPIO_SD_B1_06,
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&pin_GPIO_SD_B1_07,
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&pin_GPIO_SD_B1_08,
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&pin_GPIO_SD_B1_09,
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&pin_GPIO_SD_B1_10,
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&pin_GPIO_SD_B1_11,
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// USB Pins
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&pin_GPIO_AD_B0_01, // ID Pin
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&pin_GPIO_AD_B0_03, // OC/Fault Pin
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NULL, // Must end in NULL.
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};
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// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/mimxrt10xx/boards/imxrt1060_evkb/flash_config.c

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/*
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* Copyright 2017 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "boards/flash_config.h"
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#include "xip/fsl_flexspi_nor_boot.h"
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// Config for IS25WP064A with QSPI routed.
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__attribute__((section(".boot_hdr.conf")))
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const flexspi_nor_config_t qspiflash_config = {
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.pageSize = 256u,
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.sectorSize = 4u * 1024u,
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.ipcmdSerialClkFreq = kFLEXSPISerialClk_30MHz,
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.blockSize = 0x00010000,
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.isUniformBlockSize = false,
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.memConfig =
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{
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.readSampleClkSrc = kFLEXSPIReadSampleClk_LoopbackFromDqsPad,
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.csHoldTime = 3u,
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.csSetupTime = 3u,
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.busyOffset = 0u, // Status bit 0 indicates busy.
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.busyBitPolarity = 0u, // Busy when the bit is 1.
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.deviceModeCfgEnable = 1u,
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.deviceModeType = kDeviceConfigCmdType_QuadEnable,
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.deviceModeSeq = {
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.seqId = 4u,
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.seqNum = 1u,
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},
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.deviceModeArg = 0x40,
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.deviceType = kFLEXSPIDeviceType_SerialNOR,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = kFLEXSPISerialClk_60MHz,
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.sflashA1Size = FLASH_SIZE,
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.lookupTable =
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{
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// FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
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// The high 16 bits is command 1 and the low are command 0.
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// Within a command, the top 6 bits are the opcode, the next two are the number
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// of pads and then last byte is the operand. The operand's meaning changes
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// per opcode.
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// Indices with ROM should always have the same function because the ROM
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// bootloader uses it.
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// 0: ROM: Read LUTs
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// Quad version
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */,
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RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */),
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FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */,
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READ_SDR, FLEXSPI_4PAD, 0x04),
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// Single fast read version, good for debugging.
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// FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */,
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// RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
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// FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */,
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// READ_SDR, FLEXSPI_1PAD, 0x04),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 1: ROM: Read status
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */,
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READ_SDR, FLEXSPI_1PAD, 0x02),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 2: Empty
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EMPTY_SEQUENCE,
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// 3: ROM: Write Enable
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */,
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STOP, FLEXSPI_1PAD, 0x00),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 4: Config: Write Status
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */,
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WRITE_SDR, FLEXSPI_1PAD, 0x01),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 5: ROM: Erase Sector
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */,
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RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 6: Empty
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EMPTY_SEQUENCE,
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// 7: Empty
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EMPTY_SEQUENCE,
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// 8: Block Erase
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */,
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RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 9: ROM: Page program
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */,
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RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
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FSL_ROM_FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */,
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STOP, FLEXSPI_1PAD, 0),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 10: Empty
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EMPTY_SEQUENCE,
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// 11: ROM: Chip erase
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SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */,
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STOP, FLEXSPI_1PAD, 0),
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS,
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TWO_EMPTY_STEPS),
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// 12: Empty
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EMPTY_SEQUENCE,
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// 13: ROM: Read SFDP
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EMPTY_SEQUENCE,
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// 14: ROM: Restore no cmd
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EMPTY_SEQUENCE,
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// 15: ROM: Dummy
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EMPTY_SEQUENCE
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},
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},
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};

‎ports/mimxrt10xx/boards/imxrt1060_evkb/mpconfigboard.h

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#define MICROPY_HW_BOARD_NAME "iMX RT 1060 EVKB"
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#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A"
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// If you change this, then make sure to update the linker scripts as well to
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// make sure you don't overwrite code
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#define CIRCUITPY_INTERNAL_NVM_SIZE 0
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#define BOARD_FLASH_SIZE (8 * 1024 * 1024)
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#define MICROPY_HW_LED_STATUS (&pin_GPIO_AD_B0_08)
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#define MICROPY_HW_LED_STATUS_INVERTED (1)
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#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00)
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#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01)
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#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_07)
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#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_06)
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#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO_AD_B0_12)
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#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO_AD_B0_13)
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// Put host on the first USB so that right angle OTG adapters can fit. This is
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// the right port when looking at the board.
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#define CIRCUITPY_USB_DEVICE_INSTANCE 1
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#define CIRCUITPY_USB_HOST_INSTANCE 0

‎ports/mimxrt10xx/boards/imxrt1060_evkb/mpconfigboard.mk

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USB_VID = 0x239A
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USB_PID = 0x813C
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USB_PRODUCT = "iMX RT 1060 EVKB"
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USB_MANUFACTURER = "NXP"
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CHIP_VARIANT = MIMXRT1062DVJ6A
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CHIP_FAMILY = MIMXRT1062
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FLASH = IS25WP064A
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CIRCUITPY_USB_HOST = 1

‎ports/mimxrt10xx/boards/imxrt1060_evkb/pins.c

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#include "shared-bindings/board/__init__.h"
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#include "supervisor/board.h"
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_11) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, // Connected to audio codec
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, // Connected to audio codec
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, // Connected to audio codec
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
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// i2c sensor is on I2C1_SCL/SDA
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{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_04) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_05) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_08) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_08) },
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// Camera Sensor Interface
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_VSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PWDN), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_HSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D9), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_05) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PIXCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_04) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D2), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D5), MP_ROM_PTR(&pin_GPIO_AD_B1_12) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D4), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
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// SD Card
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_B1_12) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
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// LCD Interface
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{ MP_ROM_QSTR(MP_QSTR_LCD_BACKLIGHT), MP_ROM_PTR(&pin_GPIO_B1_15) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_ENABLE), MP_ROM_PTR(&pin_GPIO_B0_01) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_VSYNC), MP_ROM_PTR(&pin_GPIO_B0_03) },
71+
{ MP_ROM_QSTR(MP_QSTR_LCD_HSYNC), MP_ROM_PTR(&pin_GPIO_B0_02) },
72+
{ MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO_B0_00) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D0), MP_ROM_PTR(&pin_GPIO_B0_04) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D1), MP_ROM_PTR(&pin_GPIO_B0_05) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D2), MP_ROM_PTR(&pin_GPIO_B0_06) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D3), MP_ROM_PTR(&pin_GPIO_B0_07) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D4), MP_ROM_PTR(&pin_GPIO_B0_08) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D5), MP_ROM_PTR(&pin_GPIO_B0_09) },
79+
{ MP_ROM_QSTR(MP_QSTR_LCD_D6), MP_ROM_PTR(&pin_GPIO_B0_10) },
80+
{ MP_ROM_QSTR(MP_QSTR_LCD_D7), MP_ROM_PTR(&pin_GPIO_B0_11) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D8), MP_ROM_PTR(&pin_GPIO_B0_12) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D9), MP_ROM_PTR(&pin_GPIO_B0_13) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D10), MP_ROM_PTR(&pin_GPIO_B0_14) },
84+
{ MP_ROM_QSTR(MP_QSTR_LCD_D11), MP_ROM_PTR(&pin_GPIO_B0_15) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D12), MP_ROM_PTR(&pin_GPIO_B1_00) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D13), MP_ROM_PTR(&pin_GPIO_B1_01) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D14), MP_ROM_PTR(&pin_GPIO_B1_02) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_D15), MP_ROM_PTR(&pin_GPIO_B1_03) },
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// Touch Interface
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{ MP_ROM_QSTR(MP_QSTR_LCD_TOUCH_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_11) },
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// Audio Interface
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{ MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
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{ MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
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{ MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
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{ MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_12) },
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{ MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
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{ MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
100+
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// SPDIF
102+
{ MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
103+
{ MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
104+
105+
// Ethernet
106+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_41) },
107+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_40) },
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{ MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_B1_04) },
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{ MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_B1_05) },
110+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_B1_06) },
111+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_B1_07) },
112+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_B1_08) },
113+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_B1_09) },
114+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_10) },
115+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_09) },
116+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_B1_10) },
117+
{ MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_B1_11) },
118+
119+
// Freelink UART
120+
{ MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
121+
{ MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
122+
123+
// CAN
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{ MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_14) },
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{ MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_15) },
126+
{ MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B0_05) },
127+
128+
// USB
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#if CIRCUITPY_USB_HOST_INSTANCE == 0
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{ MP_ROM_QSTR(MP_QSTR_USB_HOST_DP), MP_ROM_PTR(&pin_USB_OTG1_DP) },
131+
{ MP_ROM_QSTR(MP_QSTR_USB_HOST_DM), MP_ROM_PTR(&pin_USB_OTG1_DN) },
132+
#elif CIRCUITPY_USB_HOST_INSTANCE == 1
133+
{ MP_ROM_QSTR(MP_QSTR_USB_HOST_DP), MP_ROM_PTR(&pin_USB_OTG2_DP) },
134+
{ MP_ROM_QSTR(MP_QSTR_USB_HOST_DM), MP_ROM_PTR(&pin_USB_OTG2_DN) },
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#endif
136+
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{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
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{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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