25
25
*/
26
26
27
27
#include "src/rp2_common/hardware_gpio/include/hardware/gpio.h"
28
+ <<<<<<< HEAD
29
+ == = == ==
28
30
#include "src/rp2_common/hardware_irq/include/hardware/irq.h"
31
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
29
32
30
33
#include <stdint.h>
31
34
@@ -46,12 +49,16 @@ volatile uint16_t result = 0;
46
49
volatile uint16_t buf_index = 0 ;
47
50
48
51
uint16_t pulsein_program [] = {
52
+ <<<<<<< HEAD
53
+ 0x4001 , // 1: in pins, 1
54
+ = == == ==
49
55
0xe03f , // 0: set x, 31
50
56
0x4001 , // 1: in pins, 1
51
57
0x0041 , // 2: jmp x--, 2
52
58
0x8060 , // 3: push iffull block
53
59
0xc020 , // 4: irq wait 0
54
60
0x0000 , // 5: jmp 1
61
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
55
62
};
56
63
57
64
void common_hal_pulseio_pulsein_construct (pulseio_pulsein_obj_t * self ,
@@ -73,7 +80,11 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self,
73
80
74
81
bool ok = rp2pio_statemachine_construct (& state_machine ,
75
82
pulsein_program , sizeof (pulsein_program ) / sizeof (pulsein_program [0 ]),
83
+ <<<<<<< HEAD
84
+ 1000000 ,
85
+ = == == ==
76
86
1000000 * 3 ,
87
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
77
88
NULL , 0 ,
78
89
NULL , 0 ,
79
90
pin , 1 ,
@@ -91,21 +102,28 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self,
91
102
self -> state_machine .state_machine = state_machine .state_machine ;
92
103
self -> state_machine .sm_config = state_machine .sm_config ;
93
104
self -> state_machine .offset = state_machine .offset ;
105
+ <<<<<<< HEAD
106
+ == = == ==
94
107
if ( self -> state_machine .pio == pio0 ) {
95
108
self -> pio_interrupt = PIO0_IRQ_0 ;
96
109
} else {
97
110
self -> pio_interrupt = PIO1_IRQ_0 ;
98
111
}
112
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
99
113
pio_sm_clear_fifos (self -> state_machine .pio ,self -> state_machine .state_machine );
100
114
last_level = self -> idle_state ;
101
115
level_count = 0 ;
102
116
result = 0 ;
103
117
buf_index = 0 ;
104
118
105
119
pio_sm_set_in_pins (state_machine .pio ,state_machine .state_machine ,pin -> number );
120
+ <<<<<<< HEAD
121
+ common_hal_rp2pio_statemachine_set_interrupt_handler (& state_machine ,& common_hal_pulseio_pulsein_interrupt ,NULL ,PIO_IRQ0_INTE_SM0_RXNEMPTY_BITS );
122
+ = == == ==
106
123
irq_set_exclusive_handler (self -> pio_interrupt , common_hal_pulseio_pulsein_interrupt );
107
124
hw_clear_bits (& state_machine .pio -> inte0 , 1u << state_machine .state_machine );
108
125
hw_set_bits (& state_machine .pio -> inte0 , 1u << (state_machine .state_machine + 8 ));
126
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
109
127
110
128
// exec a set pindirs to 0 for input
111
129
pio_sm_exec (state_machine .pio ,state_machine .state_machine ,0xe080 );
@@ -116,7 +134,10 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self,
116
134
pio_sm_exec (self -> state_machine .pio ,self -> state_machine .state_machine ,0x20a0 );
117
135
}
118
136
pio_sm_set_enabled (state_machine .pio , state_machine .state_machine , true);
137
+ <<<<<<< HEAD
138
+ == = == ==
119
139
irq_set_enabled (self -> pio_interrupt , true);
140
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
120
141
}
121
142
122
143
bool common_hal_pulseio_pulsein_deinited (pulseio_pulsein_obj_t * self ) {
@@ -127,7 +148,10 @@ void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) {
127
148
if (common_hal_pulseio_pulsein_deinited (self )) {
128
149
return ;
129
150
}
151
+ <<<<<<< HEAD
152
+ == = == ==
130
153
irq_set_enabled (self -> pio_interrupt , false);
154
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
131
155
pio_sm_set_enabled (self -> state_machine .pio , self -> state_machine .state_machine , false );
132
156
pio_sm_unclaim (self -> state_machine .pio , self -> state_machine .state_machine );
133
157
m_free (self -> buffer );
@@ -161,17 +185,23 @@ void common_hal_pulseio_pulsein_interrupt() {
161
185
}
162
186
}
163
187
}
188
+ <<<<<<< HEAD
189
+ == = == ==
164
190
// clear interrupt
165
191
irq_clear (self -> pio_interrupt );
166
192
hw_clear_bits (& self -> state_machine .pio -> inte0 , 1u << self -> state_machine .state_machine );
167
193
self -> state_machine .pio -> irq = 1u << self -> state_machine .state_machine ;
194
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
168
195
// check for a pulse thats too long (4000 us) or maxlen reached, and reset
169
196
if (( level_count > 4000 ) || (buf_index >= self -> maxlen )) {
170
197
pio_sm_set_enabled (self -> state_machine .pio , self -> state_machine .state_machine , false);
171
198
pio_sm_init (self -> state_machine .pio , self -> state_machine .state_machine , self -> state_machine .offset , & self -> state_machine .sm_config );
172
199
pio_sm_restart (self -> state_machine .pio ,self -> state_machine .state_machine );
173
200
pio_sm_set_enabled (self -> state_machine .pio , self -> state_machine .state_machine , true);
201
+ <<<<<<< HEAD
202
+ == = == ==
174
203
irq_set_enabled (self -> pio_interrupt , true);
204
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
175
205
}
176
206
}
177
207
void common_hal_pulseio_pulsein_resume (pulseio_pulsein_obj_t * self ,
@@ -189,10 +219,17 @@ void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self,
189
219
gpio_put (self -> pin , !self -> idle_state );
190
220
common_hal_mcu_delay_us ((uint32_t )trigger_duration );
191
221
gpio_set_function (self -> pin ,GPIO_FUNC_PIO0 );
222
+ <<<<<<< HEAD
223
+ common_hal_mcu_delay_us (225 );
224
+ }
225
+
226
+ // Reconfigure the pin for PIO
227
+ = == == ==
192
228
}
193
229
194
230
// Reconfigure the pin for PIO
195
231
common_hal_mcu_delay_us (200 );
232
+ >>>>>>> a3c3e8a0fa5e06910747f1a95a12b899562a618d
196
233
gpio_set_function (self -> pin , GPIO_FUNC_PIO0 );
197
234
pio_sm_set_enabled (self -> state_machine .pio , self -> state_machine .state_machine , true);
198
235
}
0 commit comments