@@ -64,9 +64,15 @@ static uint8_t _flash_cache[0x8000] __attribute__((aligned(4)));
6464 #endif
6565#elif defined(STM32H7 )
6666
67+ #if defined(STM32H750xx )
68+ static const flash_layout_t flash_layout [] = {
69+ { 0x08000000 , 0x20000 , 1 },
70+ };
71+ #else
6772static const flash_layout_t flash_layout [] = {
6873 { 0x08000000 , 0x20000 , 16 },
6974};
75+ #endif
7076static uint8_t _flash_cache [0x20000 ] __attribute__((aligned (4 )));
7177
7278#elif defined(STM32L4 )
@@ -80,18 +86,17 @@ static uint8_t _flash_cache[0x1000] __attribute__((aligned(4)));
8086#endif
8187
8288#define NO_CACHE 0xffffffff
83- #define MAX_CACHE 0x4000
8489
8590
8691static uint32_t _cache_flash_addr = NO_CACHE ;
8792
8893#if defined(STM32H7 )
8994// get the bank of a given flash address
90-
9195static uint32_t get_bank (uint32_t addr ) {
9296 #if defined(STM32H750xx ) // H750 only has 1 bank
93- return FLASH_BANK_1 ;
97+ return FLASH_BANK_1 ;
9498 #else
99+
95100 if (READ_BIT (FLASH -> OPTCR , FLASH_OPTCR_SWAP_BANK ) == 0 ) {
96101 // no bank swap
97102 if (addr < (FLASH_BASE + FLASH_BANK_SIZE )) {
@@ -106,9 +111,9 @@ static uint32_t get_bank(uint32_t addr) {
106111 } else {
107112 return FLASH_BANK_1 ;
108113 }
109- }
114+ }
110115 #endif
111- }
116+ }
112117#endif
113118
114119uint32_t flash_get_sector_info (uint32_t addr , uint32_t * start_addr , uint32_t * size ) {
@@ -191,6 +196,9 @@ void port_internal_flash_flush(void) {
191196 uint32_t sector_start_addr = 0xffffffff ;
192197 #if defined(STM32H7 )
193198 EraseInitStruct .Banks = get_bank (_cache_flash_addr );
199+ #if defined(STM32H750xx )
200+ EraseInitStruct .NbSectors = 1 ;
201+ #endif
194202 #endif
195203 #if CPY_STM32L4
196204 EraseInitStruct .Page = flash_get_sector_info (_cache_flash_addr , & sector_start_addr , & sector_size );
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