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Bob Abeles
committed
8334: RP2040 lacks raw memory map access
1 parent 3605d89 commit 66b3ecc

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13 files changed

+245
-33
lines changed

13 files changed

+245
-33
lines changed

locale/circuitpython.pot

Lines changed: 19 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -89,13 +89,17 @@ msgid ""
8989
msgstr ""
9090

9191
#: ports/atmel-samd/common-hal/alarm/__init__.c
92+
#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c
9293
#: ports/cxd56/common-hal/analogio/AnalogOut.c ports/cxd56/common-hal/rtc/RTC.c
94+
#: ports/espressif/common-hal/audiobusio/I2SOut.c
9395
#: ports/espressif/common-hal/rtc/RTC.c
9496
#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c
9597
#: ports/mimxrt10xx/common-hal/rtc/RTC.c ports/nrf/common-hal/alarm/__init__.c
96-
#: ports/nrf/common-hal/analogio/AnalogOut.c ports/nrf/common-hal/rtc/RTC.c
98+
#: ports/nrf/common-hal/analogio/AnalogOut.c
99+
#: ports/nrf/common-hal/audiobusio/I2SOut.c ports/nrf/common-hal/rtc/RTC.c
97100
#: ports/raspberrypi/common-hal/alarm/__init__.c
98101
#: ports/raspberrypi/common-hal/analogio/AnalogOut.c
102+
#: ports/raspberrypi/common-hal/audiobusio/I2SOut.c
99103
#: ports/raspberrypi/common-hal/rtc/RTC.c ports/stm/common-hal/alarm/__init__.c
100104
#: ports/stm/common-hal/canio/Listener.c ports/stm/common-hal/rtc/RTC.c
101105
#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audiobusio/PDMIn.c
@@ -458,9 +462,14 @@ msgstr ""
458462

459463
#: ports/espressif/common-hal/memorymap/AddressRange.c
460464
#: ports/nrf/common-hal/memorymap/AddressRange.c
465+
#: ports/raspberrypi/common-hal/memorymap/AddressRange.c
461466
msgid "Address range not allowed"
462467
msgstr ""
463468

469+
#: shared-bindings/memorymap/AddressRange.c
470+
msgid "Address range wraps around"
471+
msgstr ""
472+
464473
#: ports/espressif/common-hal/canio/CAN.c
465474
msgid "All CAN peripherals are in use"
466475
msgstr ""
@@ -2127,6 +2136,10 @@ msgstr ""
21272136
msgid "UUID value is not str, int or byte buffer"
21282137
msgstr ""
21292138

2139+
#: ports/raspberrypi/common-hal/memorymap/AddressRange.c
2140+
msgid "Unable to access unaliged IO register"
2141+
msgstr ""
2142+
21302143
#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c
21312144
#: ports/atmel-samd/common-hal/audioio/AudioOut.c
21322145
#: ports/raspberrypi/common-hal/audiobusio/I2SOut.c
@@ -2180,14 +2193,14 @@ msgstr ""
21802193
msgid "Unable to start mDNS query"
21812194
msgstr ""
21822195

2183-
#: shared-bindings/memorymap/AddressRange.c
2184-
msgid "Unable to write to address."
2185-
msgstr ""
2186-
21872196
#: shared-bindings/nvm/ByteArray.c
21882197
msgid "Unable to write to nvm."
21892198
msgstr ""
21902199

2200+
#: ports/raspberrypi/common-hal/memorymap/AddressRange.c
2201+
msgid "Unable to write to read-only memory"
2202+
msgstr ""
2203+
21912204
#: shared-bindings/alarm/SleepMemory.c
21922205
msgid "Unable to write to sleep_memory."
21932206
msgstr ""
@@ -2948,7 +2961,7 @@ msgstr ""
29482961
msgid "empty file"
29492962
msgstr ""
29502963

2951-
#: extmod/moduasyncio.c extmod/moduheapq.c extmod/modutimeq.c
2964+
#: extmod/moduasyncio.c extmod/moduheapq.c
29522965
msgid "empty heap"
29532966
msgstr ""
29542967

@@ -3899,10 +3912,6 @@ msgstr ""
38993912
msgid "pull masks conflict with direction masks"
39003913
msgstr ""
39013914

3902-
#: extmod/modutimeq.c
3903-
msgid "queue overflow"
3904-
msgstr ""
3905-
39063915
#: py/parse.c
39073916
msgid "raw f-strings are not supported"
39083917
msgstr ""

ports/espressif/common-hal/memorymap/AddressRange.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ size_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange
6666
return self->len;
6767
}
6868

69-
bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
69+
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
7070
size_t start_index, uint8_t *values, size_t len) {
7171
uint8_t *address = self->start_address + start_index;
7272
#pragma GCC diagnostic push
@@ -83,8 +83,6 @@ bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_ob
8383
memcpy(address, values, len);
8484
}
8585
#pragma GCC diagnostic pop
86-
87-
return true;
8886
}
8987

9088
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,

ports/nrf/common-hal/memorymap/AddressRange.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ uint32_t common_hal_memorymap_addressrange_get_length(const memorymap_addressran
9595
}
9696

9797

98-
bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
98+
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
9999
uint32_t start_index, uint8_t *values, uint32_t len) {
100100
uint8_t *address = self->start_address + start_index;
101101
#pragma GCC diagnostic push
@@ -112,8 +112,6 @@ bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_ob
112112
memcpy(address, values, len);
113113
}
114114
#pragma GCC diagnostic pop
115-
116-
return true;
117115
}
118116

119117
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,
Lines changed: 136 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,136 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2020 microDev
7+
* Copyright (c) 2023 Bob Abeles
8+
*
9+
* Permission is hereby granted, free of charge, to any person obtaining a copy
10+
* of this software and associated documentation files (the "Software"), to deal
11+
* in the Software without restriction, including without limitation the rights
12+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13+
* copies of the Software, and to permit persons to whom the Software is
14+
* furnished to do so, subject to the following conditions:
15+
*
16+
* The above copyright notice and this permission notice shall be included in
17+
* all copies or substantial portions of the Software.
18+
*
19+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25+
* THE SOFTWARE.
26+
*/
27+
28+
#include <string.h>
29+
30+
#include "shared-bindings/memorymap/AddressRange.h"
31+
32+
#include "py/runtime.h"
33+
34+
#include "hardware/regs/addressmap.h"
35+
36+
// RP2 address map ranges, must be arranged in order by ascending start address
37+
addressmap_rp2_range_t rp2_ranges[] = {
38+
{(uint8_t *)ROM_BASE, 0x00004000, ROM}, // boot ROM
39+
{(uint8_t *)XIP_BASE, 0x00100000, XIP}, // XIP normal cache operation
40+
{(uint8_t *)XIP_NOALLOC_BASE, 0x00100000, XIP}, // XIP check for hit, no update on miss
41+
{(uint8_t *)XIP_NOCACHE_BASE, 0x00100000, XIP}, // XIP don't check for hit, no update on miss
42+
{(uint8_t *)XIP_NOCACHE_NOALLOC_BASE, 0x00100000, XIP}, // XIP bypass cache completely
43+
{(uint8_t *)XIP_CTRL_BASE, 0x00004000, IO}, // XIP control registers
44+
{(uint8_t *)XIP_SRAM_BASE, 0x00004000, SRAM}, // XIP SRAM 16KB XIP cache
45+
{(uint8_t *)XIP_SSI_BASE, 0x00004000, IO}, // XIP SSI registers
46+
{(uint8_t *)SRAM_BASE, 0x00042000, SRAM}, // SRAM 256KB striped plus 16KB contiguous
47+
{(uint8_t *)SRAM0_BASE, 0x00040000, SRAM}, // SRAM0 to SRAM3 256KB non-striped
48+
{(uint8_t *)SYSINFO_BASE, 0x00070000, IO}, // APB peripherals
49+
{(uint8_t *)DMA_BASE, 0x00004000, IO}, // DMA registers
50+
{(uint8_t *)USBCTRL_DPRAM_BASE, 0x00001000, SRAM}, // USB DPSRAM 4KB
51+
{(uint8_t *)USBCTRL_REGS_BASE, 0x00004000, IO}, // USB registers
52+
{(uint8_t *)PIO0_BASE, 0x00004000, IO}, // PIO0 registers
53+
{(uint8_t *)PIO1_BASE, 0x00004000, IO}, // PIO1 registers
54+
{(uint8_t *)SIO_BASE, 0x00001000, IO}, // SIO registers, no aliases
55+
{(uint8_t *)PPB_BASE, 0x00004000, IO} // PPB registers
56+
};
57+
58+
void common_hal_memorymap_addressrange_construct(memorymap_addressrange_obj_t *self,
59+
uint8_t *start_address, size_t length) {
60+
for (size_t i = 0; i < MP_ARRAY_SIZE(rp2_ranges); i++) {
61+
if (start_address <= rp2_ranges[i].start_address) {
62+
uint8_t *range_end_address = rp2_ranges[i].start_address + rp2_ranges[i].len - 1;
63+
uint8_t *end_address = start_address + length - 1;
64+
if (start_address > range_end_address || end_address > range_end_address) {
65+
break;
66+
}
67+
self->start_address = start_address;
68+
self->len = length;
69+
self->type = rp2_ranges[i].type;
70+
return;
71+
}
72+
}
73+
74+
mp_raise_ValueError(translate("Address range not allowed"));
75+
}
76+
77+
size_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange_obj_t *self) {
78+
return self->len;
79+
}
80+
81+
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
82+
size_t start_index, uint8_t *values, size_t len) {
83+
uint8_t *dest_addr = self->start_address + start_index;
84+
switch (self->type) {
85+
case SRAM:
86+
// Writes to SRAM may be arbitrary length and alignment. We use memcpy() which
87+
// may optimize aligned writes depending on CIRCUITPY_FULL_BUILD of the CP build.
88+
memcpy(dest_addr, values, len);
89+
break;
90+
case IO:
91+
if ((size_t)dest_addr & 0x03 || len & 0x03) {
92+
// Unaligned access or unaligned length not supported by RP2 for IO registers
93+
mp_raise_RuntimeError(translate("Unable to access unaliged IO register"));
94+
} else {
95+
// Aligned access and length, use 32-bit writes
96+
uint32_t *dest_addr32 = (uint32_t *)dest_addr;
97+
size_t len32 = len >> 2;
98+
for (size_t i = 0; i < len32; i++) {
99+
*dest_addr32++ = ((uint32_t *)values)[i << 2];
100+
}
101+
}
102+
break;
103+
case XIP:
104+
case ROM:
105+
// XIP and ROM are read-only
106+
mp_raise_RuntimeError(translate("Unable to write to read-only memory"));
107+
break;
108+
}
109+
}
110+
111+
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,
112+
size_t start_index, size_t len, uint8_t *values) {
113+
uint8_t *src_addr = self->start_address + start_index;
114+
switch (self->type) {
115+
case SRAM:
116+
case XIP:
117+
case ROM:
118+
// Reads from these sources may be arbitrary length and alignment. We use memcpy()
119+
// which may optimize aligned writes depending on CIRCUITPY_FULL_BUILD of the CP build.
120+
memcpy(values, src_addr, len);
121+
break;
122+
case IO:
123+
if ((size_t)src_addr & 0x03 || len & 0x03) {
124+
// Unaligned access or unaligned length not supported by RP2 for IO registers
125+
mp_raise_RuntimeError(translate("Unable to access unaliged IO register"));
126+
} else {
127+
// Aligned access and length, use 32-bit writes
128+
uint32_t *src_addr32 = (uint32_t *)src_addr;
129+
size_t len32 = len >> 2;
130+
for (size_t i = 0; i < len32; i++) {
131+
((uint32_t *)values)[i] = *src_addr32++;
132+
}
133+
}
134+
break;
135+
}
136+
}
Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,49 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2020 microDev
7+
* Copyright (c) 2023 Bob Abeles
8+
*
9+
* Permission is hereby granted, free of charge, to any person obtaining a copy
10+
* of this software and associated documentation files (the "Software"), to deal
11+
* in the Software without restriction, including without limitation the rights
12+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13+
* copies of the Software, and to permit persons to whom the Software is
14+
* furnished to do so, subject to the following conditions:
15+
*
16+
* The above copyright notice and this permission notice shall be included in
17+
* all copies or substantial portions of the Software.
18+
*
19+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25+
* THE SOFTWARE.
26+
*/
27+
28+
#ifndef MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_MEMORYMAP_ADDRESSRANGE_H
29+
#define MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_MEMORYMAP_ADDRESSRANGE_H
30+
31+
#include "py/obj.h"
32+
33+
// depending on the section memory type, different access methods and rules apply
34+
typedef enum { SRAM, ROM, XIP, IO } memorymap_rp2_section_t;
35+
36+
typedef struct {
37+
mp_obj_base_t base;
38+
uint8_t *start_address;
39+
size_t len;
40+
memorymap_rp2_section_t type;
41+
} memorymap_addressrange_obj_t;
42+
43+
typedef struct {
44+
uint8_t *start_address;
45+
size_t len;
46+
memorymap_rp2_section_t type;
47+
} addressmap_rp2_range_t;
48+
49+
#endif // MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_MEMORYMAP_ADDRESSRANGE_H
Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1 @@
1+
// No memorymap module functions.

ports/raspberrypi/mpconfigport.mk

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ CIRCUITPY_FULL_BUILD ?= 1
1515
CIRCUITPY_AUDIOMP3 ?= 1
1616
CIRCUITPY_BITOPS ?= 1
1717
CIRCUITPY_IMAGECAPTURE ?= 1
18+
CIRCUITPY_MEMORYMAP ?= 1
1819
CIRCUITPY_PWMIO ?= 1
1920
CIRCUITPY_RGBMATRIX ?= $(CIRCUITPY_DISPLAYIO)
2021
CIRCUITPY_ROTARYIO ?= 1

py/argcheck.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -115,6 +115,8 @@ void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n
115115
out_vals[i].u_bool = mp_obj_is_true(given_arg);
116116
} else if ((allowed[i].flags & MP_ARG_KIND_MASK) == MP_ARG_INT) {
117117
out_vals[i].u_int = mp_obj_get_int(given_arg);
118+
} else if ((allowed[i].flags & MP_ARG_KIND_MASK) == MP_ARG_UINT) {
119+
out_vals[i].u_uint = mp_obj_get_uint(given_arg);
118120
} else {
119121
assert((allowed[i].flags & MP_ARG_KIND_MASK) == MP_ARG_OBJ);
120122
out_vals[i].u_obj = given_arg;

py/obj.c

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -420,6 +420,21 @@ bool mp_obj_get_int_maybe(mp_const_obj_t arg, mp_int_t *value) {
420420
return true;
421421
}
422422

423+
mp_uint_t mp_obj_get_uint(mp_const_obj_t arg) {
424+
if (arg == mp_const_false) {
425+
return 0;
426+
} else if (arg == mp_const_true) {
427+
return 1;
428+
} else if (mp_obj_is_small_int(arg)) {
429+
return MP_OBJ_SMALL_INT_VALUE(arg);
430+
} else if (mp_obj_is_type(arg, &mp_type_int)) {
431+
return mp_obj_int_get_uint_checked(arg);
432+
} else {
433+
mp_obj_t res = mp_unary_op(MP_UNARY_OP_INT, (mp_obj_t)arg);
434+
return mp_obj_int_get_uint_checked(res);
435+
}
436+
}
437+
423438
#if MICROPY_PY_BUILTINS_FLOAT
424439
bool mp_obj_get_float_maybe(mp_obj_t arg, mp_float_t *value) {
425440
mp_float_t val;

py/obj.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -939,6 +939,7 @@ static MP_INLINE bool mp_obj_is_integer(mp_const_obj_t o) {
939939
mp_int_t mp_obj_get_int(mp_const_obj_t arg);
940940
mp_int_t mp_obj_get_int_truncated(mp_const_obj_t arg);
941941
bool mp_obj_get_int_maybe(mp_const_obj_t arg, mp_int_t *value);
942+
mp_uint_t mp_obj_get_uint(mp_const_obj_t arg);
942943
#if MICROPY_PY_BUILTINS_FLOAT
943944
mp_float_t mp_obj_get_float(mp_obj_t self_in);
944945
bool mp_obj_get_float_maybe(mp_obj_t arg, mp_float_t *value);

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