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dpgeorgedpgeorge
committed
alif: Support more fine-grained pin alternate function selection.
Now raises an exception if the pin doesn't support the alternate function unit number and line type, eg UART0_TX (previously it only checked the peripheral). Signed-off-by: Damien George <[email protected]>
1 parent 29a873e commit 737acef

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8 files changed

+371
-185
lines changed

8 files changed

+371
-185
lines changed

‎ports/alif/cyw43_port_spi.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434
#include "sys_ctrl_spi.h"
3535

3636
// CYW43 is connected to SPI3.
37+
#define HW_SPI_UNIT (3)
3738
#define HW_SPI ((SPI_Type *)SPI3_BASE)
3839
#define SPI_BAUDRATE (16000000)
3940
#define SPI_RX_FIFO_SIZE (16)
@@ -56,9 +57,12 @@ static void spi_bus_init(void) {
5657
mp_hal_pin_output(pin_WL_CS);
5758
mp_hal_pin_high(pin_WL_CS);
5859
// NOTE: Alif recommends enabled input read for all SPI pins.
59-
mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
60-
mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
61-
mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
60+
mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
61+
MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_SCLK, HW_SPI_UNIT), true);
62+
mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
63+
MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_MOSI, HW_SPI_UNIT), true);
64+
mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
65+
MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_MISO, HW_SPI_UNIT), true);
6266

6367
// Starts out clock_polarity=1, clock_phase=0.
6468
spi_mode_master(HW_SPI);

‎ports/alif/machine_i2c.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -135,9 +135,9 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
135135

136136
// Configure I2C pins.
137137
mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
138-
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
138+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, self->i2c_id), true);
139139
mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
140-
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
140+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, self->i2c_id), true);
141141

142142
// Initialize I2C controller.
143143
self->i2c->I2C_CON = I2C_IC_CON_ENABLE_MASTER_MODE |
@@ -244,18 +244,18 @@ int machine_i2c_transfer(mp_obj_base_t *self_in, uint16_t addr, size_t n, mp_mac
244244

245245
// Switch pins to GPIO/OD.
246246
mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_UP,
247-
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_NONE, true);
247+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, 0, true);
248248
mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_UP,
249-
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_NONE, true);
249+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, 0, true);
250250

251251
// Perform the transfer.
252252
ret = mp_machine_soft_i2c_transfer(&soft_i2c.base, addr, 1, &bufs, flags);
253253

254254
// Re-configure I2C pins.
255255
mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
256-
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
256+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, self->i2c_id), true);
257257
mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
258-
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
258+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, self->i2c_id), true);
259259

260260
return ret;
261261
}

‎ports/alif/machine_spi.c

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,20 @@ static machine_spi_obj_t machine_spi_obj[] = {
6060

6161
};
6262

63+
static const uint8_t spi_pin_alt[] = {
64+
MP_HAL_PIN_ALT_SPI_SCLK,
65+
MP_HAL_PIN_ALT_SPI_MISO,
66+
MP_HAL_PIN_ALT_SPI_MOSI,
67+
MP_HAL_PIN_ALT_SPI_SS0,
68+
};
69+
70+
static const uint8_t lpspi_pin_alt[] = {
71+
MP_HAL_PIN_ALT_LPSPI_SCLK,
72+
MP_HAL_PIN_ALT_LPSPI_MISO,
73+
MP_HAL_PIN_ALT_LPSPI_MOSI,
74+
MP_HAL_PIN_ALT_LPSPI_SS,
75+
};
76+
6377
static inline uint32_t spi_get_clk(machine_spi_obj_t *spi) {
6478
return spi->is_lp ? GetSystemCoreClock() : GetSystemAHBClock();
6579
}
@@ -131,9 +145,15 @@ static void spi_init(machine_spi_obj_t *spi, uint32_t baudrate,
131145
}
132146

133147
// Configure SPI pins.
148+
const uint8_t *alt;
149+
if (spi->id <= 3) {
150+
alt = spi_pin_alt;
151+
} else {
152+
alt = lpspi_pin_alt;
153+
}
134154
for (size_t i = 0; i < MP_ARRAY_SIZE(pins) && pins[i]; i++) {
135155
mp_hal_pin_config(pins[i], MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
136-
MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
156+
MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_MAKE(alt[i], spi->id), true);
137157
}
138158

139159
// Disable all interrupts.

‎ports/alif/mcu/ensemble_pin_alt.csv

Lines changed: 129 additions & 129 deletions
Original file line numberDiff line numberDiff line change
@@ -1,130 +1,130 @@
11
Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7
2-
P0_0,,OSPI,UART,I3C,UT,LPCAM,CAM,ANA
3-
P0_1,,OSPI,UART,I3C,UT,LPCAM,CAM,ANA
4-
P0_2,,OSPI,UART,I2C,UT,LPCAM,CAM,ANA
5-
P0_3,,OSPI,UART,I2C,UT,LPCAM,CAM,ANA
6-
P0_4,,OSPI,UART,PDM,I2C,UT,,ANA
7-
P0_5,,OSPI,UART,PDM,I2C,UT,,ANA
8-
P0_6,,OSPI,UART,PDM,I2C,UT,,ANA
9-
P0_7,,OSPI,UART,PDM,I2C,UT,CDC,ANA
10-
P1_0,,UART,SPI,I2C,UT,LPCAM,ETH,ANA
11-
P1_1,,UART,SPI,I2C,UT,LPCAM,ETH,ANA
12-
P1_2,,UART,SPI,I3C,UT,LPCAM,ETH,ANA
13-
P1_3,,UART,SPI,I3C,UT,LPCAM,ETH,ANA
14-
P1_4,,OSPI,UART,SPI,UT,LPCAM,ETH,ANA
15-
P1_5,,OSPI,UART,SPI,UT,LPCAM,ETH,ANA
16-
P1_6,,OSPI,UART,I2S,UT,LPCAM,ETH,ANA
17-
P1_7,,OSPI,UART,I2S,UT,LPCAM,ETH,ANA
18-
P2_0,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
19-
P2_1,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
20-
P2_2,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
21-
P2_3,,OSPI,UART,LPPDM,UT,LPCAM,CDC,ANA
22-
P2_4,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
23-
P2_5,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
24-
P2_6,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
25-
P2_7,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
26-
P3_0,,OSPI,UART,PDM,I2S,QEC,LPCAM,CAM
27-
P3_1,,OSPI,UART,PDM,I2S,QEC,LPCAM,CAM
28-
P3_2,,OSPI,PDM,I2S,I3C,QEC,LPCAM,CAM
29-
P3_3,,OSPI,PDM,I2S,I3C,QEC,LPCAM,CAM
30-
P3_4,,OSPI,UART,LPPDM,I2S,I2C,QEC,CAM
31-
P3_5,,OSPI,UART,LPPDM,SPI,I2C,QEC,CAM
32-
P3_6,,HFXO,LPUART,LPPDM,SPI,I2C,QEC,CAM
33-
P3_7,,JTAG,LPUART,LPPDM,SPI,I2C,QEC,CAM
34-
P4_0,,JTAG,,I2S,SPI,QEC,CDC,CAM
35-
P4_1,,JTAG,I2S,SPI,QEC,SD,CDC,CAM
36-
P4_2,,JTAG,,I2S,SPI,QEC,SD,CAM
37-
P4_3,,JTAG,,I2S,SPI,QEC,SD,CAM
38-
P4_4,,JTAG,I2S,SPI,FAULT,,,
39-
P4_5,,JTAG,SPI,FAULT,,,,
40-
P4_6,,JTAG,SPI,FAULT,,,,
41-
P4_7,,JTAG,SPI,FAULT,,,,
42-
P5_0,,OSPI,UART,PDM,SPI,I2C,UT,SD
43-
P5_1,,OSPI,UART,PDM,SPI,I2C,UT,SD
44-
P5_2,,OSPI,UART,PDM,SPI,LPI2C,UT,SD
45-
P5_3,,OSPI,UART,SPI,LPI2C,UT,SD,CDC
46-
P5_4,,OSPI,UART,PDM,SPI,UT,SD,CDC
47-
P5_5,,OSPI,UART,PDM,UT,SD,ETH,CDC
48-
# P5_6 doesn't really have OSPI on AF1 but it's needed for P10_7 to be in OSPI mode
49-
P5_6,,OSPI,UART,I2C,UT,SD,ETH,CDC
50-
P5_7,,OSPI,UART,I2C,UT,SD,ETH,
51-
P6_0,,OSPI,UART,PDM,UT,SD,ETH,
52-
P6_1,,OSPI,UART,PDM,UT,SD,ETH,
53-
P6_2,,OSPI,UART,,PDM,UT,SD,ETH
54-
P6_3,,OSPI,UART,,PDM,UT,SD,ETH
55-
P6_4,,OSPI,UART,,SPI,UT,SD,ETH
56-
P6_5,,OSPI,UART,,SPI,UT,SD,ETH
57-
P6_6,,OSPI,UART,,SPI,UT,SD,ETH
58-
P6_7,,OSPI,UART,PDM,SPI,UT,SD,ETH
59-
P7_0,,,CMP,SPI,I2C,UT,SD,
60-
P7_1,,,CMP,SPI,I2C,UT,SD,
61-
P7_2,,,UART,CMP,SPI,I2C,UT,SD
62-
P7_3,,,UART,CMP,SPI,I2C,UT,
63-
P7_4,,,LPUART,LPPDM,LPSPI,LPI2C,UT,
64-
P7_5,,,LPUART,,LPPDM,LPSPI,LPI2C,UT
65-
P7_6,,,LPUART,,LPPDM,LPSPI,I3C,UT
66-
P7_7,,,LPUART,,LPPDM,LPSPI,I3C,UT
67-
P8_0,,OSPI,AUDIO,FAULT,LPCAM,SD,CDC,CAM
68-
P8_1,,I2S,FAULT,LPCAM,SD,CDC,CAM,
69-
P8_2,,I2S,SPI,FAULT,LPCAM,SD,CDC,CAM
70-
P8_3,,I2S,SPI,FAULT,LPCAM,SD,CDC,CAM
71-
P8_4,,I2S,SPI,QEC,LPCAM,SD,CDC,CAM
72-
P8_5,,,SPI,QEC,LPCAM,SD,CDC,CAM
73-
P8_6,,,I2S,QEC,LPCAM,SD,CDC,CAM
74-
P8_7,,,I2S,QEC,LPCAM,SD,CDC,CAM
75-
P9_0,,,I2S,QEC,SD,CDC,CAM,
76-
P9_1,,LPUART,I2S,QEC,SD,CDC,CAM,
77-
P9_2,,LPUART,I2S,SPI,QEC,SD,CDC,CAM
78-
P9_3,,HFXO,UART,I2S,SPI,QEC,CDC,CAM
79-
P9_4,,UART,I2S,SPI,I2C,QEC,CDC,CAM
80-
P9_5,,OSPI,I2S,SPI,I2C,QEC,CDC,CAM
81-
P9_6,,OSPI,AUDIO,SPI,I2C,QEC,CDC,CAM
82-
P9_7,,OSPI,UART,SPI,I2C,QEC,CDC,CAM
83-
P10_0,,OSPI,UART,SPI,UT,LPCAM,CDC,CAM
84-
P10_1,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
85-
P10_2,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
86-
P10_3,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
87-
P10_4,,OSPI,,LPI2S,I2C,UT,ETH,CDC
88-
P10_5,,UART,I2S,SPI,I2C,UT,ETH,CDC
89-
P10_6,,UART,I2S,SPI,I2C,UT,ETH,CDC
90-
P10_7,,UART,I2S,SPI,I2C,UT,CDC,OSPI
91-
P11_0,,OSPI,UART,I2S,SPI,UT,ETH,CDC
92-
P11_1,,OSPI,UART,SPI,UT,ETH,CDC,
93-
P11_2,,OSPI,UART,LPPDM,SPI,UT,ETH,CDC
94-
P11_3,,OSPI,UART,LPPDM,SPI,UT,ETH,CDC
95-
P11_4,,OSPI,UART,PDM,LPSPI,UT,ETH,CDC
96-
P11_5,,OSPI,UART,PDM,LPSPI,UT,ETH,CDC
97-
P11_6,,OSPI,UART,LPPDM,LPSPI,UT,ETH,CDC
98-
P11_7,,OSPI,UART,LPPDM,LPSPI,UT,ETH,CDC
99-
P12_0,,OSPI,AUDIO,I2S,UT,CDC,,
100-
P12_1,,OSPI,UART,I2S,UT,CDC,,
101-
P12_2,,OSPI,UART,I2S,UT,CDC,,
102-
P12_3,,OSPI,UART,I2S,UT,CDC,,
103-
P12_4,,OSPI,SPI,UT,,CDC,,
104-
P12_5,,,SPI,UT,,CDC,,
105-
P12_6,,,SPI,UT,,CDC,,
106-
P12_7,,OSPI,,SPI,UT,CDC,,
107-
P13_0,,OSPI,,SPI,QEC,SD,CDC,
108-
P13_1,,OSPI,SPI,QEC,SD,CDC,,
109-
P13_2,,OSPI,SPI,QEC,SD,CDC,,
110-
P13_3,,OSPI,SPI,QEC,SD,CDC,,
111-
P13_4,,OSPI,LPI2S,QEC,SD,CDC,,
112-
P13_5,,OSPI,LPI2S,QEC,SD,CDC,,
113-
P13_6,,OSPI,LPI2S,QEC,SD,CDC,,
114-
P13_7,,OSPI,LPI2S,QEC,SD,CDC,,
115-
P14_0,,OSPI,UART,QEC,SD,,,
116-
P14_1,,OSPI,UART,,QEC,SD,,
117-
P14_2,,OSPI,UART,,QEC,SD,,
118-
P14_3,,OSPI,UART,,QEC,,,
119-
P14_4,,CMP,SPI,FAULT,,,,
120-
P14_5,,CMP,SPI,FAULT,,,,
121-
P14_6,,CMP,SPI,FAULT,,,,
122-
P14_7,,CMP,SPI,FAULT,,,,
123-
P15_0,,LPTMR,,,,,,
124-
P15_1,,LPTMR,,,,,,
125-
P15_2,,LPTMR,,,,,,
126-
P15_3,,LPTMR,,,,,,
127-
P15_4,,,,,,,,
128-
P15_5,,,,,,,,
129-
P15_6,,,,,,,,
130-
P15_7,,,,,,,,
2+
P0_0,GPIO,OSPI0_D0,UART0_RX,I3C_SDA,UT0_T0,LPCAM_HSYNC,CAM_HSYNC,ANA_S0
3+
P0_1,GPIO,OSPI0_D1,UART0_TX,I3C_SCL,UT0_T1,LPCAM_VSYNC,CAM_VSYNC,ANA_S1
4+
P0_2,GPIO,OSPI0_D2,UART0_CTS,I2C0_SDA,UT1_T0,LPCAM_PCLK,CAM_PCLK,ANA_S2
5+
P0_3,GPIO,OSPI0_D3,UART0_RTS,I2C0_SCL,UT1_T1,LPCAM_XVCLK,CAM_XVCLK,ANA_S3
6+
P0_4,GPIO,OSPI0_D4,UART1_RX,PDM_D0,I2C1_SDA,UT2_T0,,ANA_S4
7+
P0_5,GPIO,OSPI0_D5,UART1_TX,PDM_C0,I2C1_SCL,UT2_T1,,ANA_S5
8+
P0_6,GPIO,OSPI0_D6,UART1_CTS,PDM_D1,I2C2_SCL,UT3_T0,,ANA_S6
9+
P0_7,GPIO,OSPI0_D7,UART1_RTS,PDM_C1,I2C2_SDA,UT3_T1,CDC_DE,ANA_S7
10+
P1_0,GPIO,UART2_RX,SPI0_MISO,I2C3_SDA,UT4_T0,LPCAM_HSYNC,ETH_RXD0,ANA_S8
11+
P1_1,GPIO,UART2_TX,SPI0_MOSI,I2C3_SCL,UT4_T1,LPCAM_VSYNC,ETH_RXD1,ANA_S9
12+
P1_2,GPIO,UART3_RX,SPI0_SCLK,I3C_SDA,UT5_T0,LPCAM_PCLK,ETH_RST,ANA_S10
13+
P1_3,GPIO,UART3_TX,SPI0_SS0,I3C_SCL,UT5_T1,LPCAM_XVCLK,ETH_TXD0,ANA_S11
14+
P1_4,GPIO,OSPI0_SS0,UART0_RX,SPI0_SS1,UT6_T0,LPCAM_D0,ETH_TXD1,ANA_S12
15+
P1_5,GPIO,OSPI0_SS1,UART0_TX,SPI0_SS2,UT6_T1,LPCAM_D1,ETH_TXEN,ANA_S13
16+
P1_6,GPIO,OSPI0_RXDS,UART1_RX,I2S0_SDI,UT7_T0,LPCAM_D2,ETH_IRQ,ANA_S14
17+
P1_7,GPIO,OSPI0_SCLK,UART1_TX,I2S0_SDO,UT7_T1,LPCAM_D3,ETH_REFCLK,ANA_S15
18+
P2_0,GPIO,OSPI0_D0,UART2_RX,LPPDM_D0,UT8_T0,LPCAM_D4,ETH_MDIO,ANA_S16
19+
P2_1,GPIO,OSPI0_D1,UART2_TX,LPPDM_C0,UT8_T1,LPCAM_D5,ETH_MDC,ANA_S17
20+
P2_2,GPIO,OSPI0_D2,UART3_RX,LPPDM_D1,UT9_T0,LPCAM_D6,ETH_CRS_DV_C,ANA_S18
21+
P2_3,GPIO,OSPI0_D3,UART3_TX,LPPDM_C1,UT9_T1,LPCAM_D7,CDC_PCLK,ANA_S19
22+
P2_4,GPIO,OSPI0_D4,LPI2S_SDI,SPI1_MISO,UT10_T0,LPCAM_D0,CAM_D0,ANA_S20
23+
P2_5,GPIO,OSPI0_D5,LPI2S_SDO,SPI1_MOSI,UT10_T1,LPCAM_D1,CAM_D1,ANA_S21
24+
P2_6,GPIO,OSPI0_D6,LPI2S_SCLK,SPI1_SCLK,UT11_T0,LPCAM_D2,CAM_D2,ANA_S22
25+
P2_7,GPIO,OSPI0_D7,LPI2S_WS,SPI1_SS0,UT11_T1,LPCAM_D3,CAM_D3,ANA_S23
26+
P3_0,GPIO,OSPI0_SCLK,UART4_RX,PDM_D0,I2S0_SCLK,QEC0_X,LPCAM_D4,CAM_D4
27+
P3_1,GPIO,OSPI0_SCLKN,UART4_TX,PDM_C0,I2S0_WS,QEC0_Y,LPCAM_D5,CAM_D5
28+
P3_2,GPIO,OSPI0_SS0,PDM_D1,I2S1_SDI,I3C_SDA,QEC0_Z,LPCAM_D6,CAM_D6
29+
P3_3,GPIO,OSPI0_SS1,PDM_C1,I2S1_SDO,I3C_SCL,QEC1_X,LPCAM_D7,CAM_D7
30+
P3_4,GPIO,OSPI0_RXDS,UART5_RX,LPPDM_C0,I2S1_SCLK,I2C0_SCL,QEC1_Y,CAM_D8
31+
P3_5,GPIO,OSPI0_SCLKN,UART5_TX,LPPDM_D0,SPI0_SS1,I2C0_SDA,QEC1_Z,CAM_D9
32+
P3_6,GPIO,HFXO_OUT,LPUART_CTS,LPPDM_C1,SPI0_SS2,I2C1_SDA,QEC2_X,CAM_D10
33+
P3_7,GPIO,JTAG_TRACECLK,LPUART_RTS,LPPDM_D1,SPI1_SS1,I2C1_SCL,QEC2_Y,CAM_D11
34+
P4_0,GPIO,JTAG_TDATA0,,I2S1_WS,SPI1_SS2,QEC2_Z,CDC_VSYNC,CAM_D12
35+
P4_1,GPIO,JTAG_TDATA1,I2S0_SDI,SPI1_SS3,QEC3_X,SD_CLK,CDC_HSYNC,CAM_D13
36+
P4_2,GPIO,JTAG_TDATA2,,I2S0_SDO,SPI2_MISO,QEC3_Y,SD_CMD,CAM_D14
37+
P4_3,GPIO,JTAG_TDATA3,,I2S0_SCLK,SPI2_MOSI,QEC3_Z,SD_RST,CAM_D15
38+
P4_4,GPIO,JTAG_TCK,I2S0_WS,SPI2_SCLK,FAULT0_A,,,
39+
P4_5,GPIO,JTAG_TMS,SPI2_SS0,FAULT1_A,,,,
40+
P4_6,GPIO,JTAG_TDI,SPI2_SS1,FAULT2_A,,,,
41+
P4_7,GPIO,JTAG_TDO,SPI2_SS2,FAULT3_A,,,,
42+
P5_0,GPIO,OSPI1_RXDS,UART4_RX,PDM_D2,SPI0_MISO,I2C2_SDA,UT0_T0,SD_D0
43+
P5_1,GPIO,OSPI1_SS0,UART4_TX,PDM_D3,SPI0_MOSI,I2C2_SCL,UT0_T1,SD_D1
44+
P5_2,GPIO,OSPI1_SCLKN,UART5_RX,PDM_C3,SPI0_SS0,LPI2C_SCL,UT1_T0,SD_D2
45+
P5_3,GPIO,OSPI1_SCLK,UART5_TX,SPI0_SCLK,LPI2C_SDA,UT1_T1,SD_D3,CDC_PCLK
46+
P5_4,GPIO,OSPI1_SS1,UART3_CTS,PDM_D2,SPI0_SS3,UT2_T0,SD_D4,CDC_DE
47+
P5_5,GPIO,OSPI1_SCLK,UART3_RTS,PDM_D3,UT2_T1,SD_D5,ETH_RXD0,CDC_HSYNC
48+
# P5_6 doesn't really have OSPI on AF1 but it's needed for P10_7 to be in OSPI1_RXDS mode
49+
P5_6,GPIO,OSPI1_RXDS,UART1_CTS,I2C2_SCL,UT3_T0,SD_D6,ETH_RXD1,CDC_VSYNC
50+
P5_7,GPIO,OSPI1_SS0,UART1_RTS,I2C2_SDA,UT3_T1,SD_D7,ETH_RST,
51+
P6_0,GPIO,OSPI0_D0,UART4_DE,PDM_D0,UT4_T0,SD_D0,ETH_TXD0,
52+
P6_1,GPIO,OSPI0_D1,UART5_DE,PDM_C0,UT4_T1,SD_D1,ETH_TXD1,
53+
P6_2,GPIO,OSPI0_D2,UART2_CTS,,PDM_D1,UT5_T0,SD_D2,ETH_TXEN
54+
P6_3,GPIO,OSPI0_D3,UART2_RTS,,PDM_C1,UT5_T1,SD_D3,ETH_IRQ
55+
P6_4,GPIO,OSPI0_D4,UART2_CTS,,SPI1_SS0,UT6_T0,SD_D4,ETH_REFCLK
56+
P6_5,GPIO,OSPI0_D5,UART2_RTS,,SPI1_SS1,UT6_T1,SD_D5,ETH_MDIO
57+
P6_6,GPIO,OSPI0_D6,UART0_CTS,,SPI1_SS2,UT7_T0,SD_D6,ETH_MDC
58+
P6_7,GPIO,OSPI0_D7,UART0_RTS,PDM_C2,SPI1_SS3,UT7_T1,SD_D7,ETH_CRS_DV_A
59+
P7_0,GPIO,,CMP3_OUT,SPI0_MISO,I2C0_SDA,UT8_T0,SD_CMD,
60+
P7_1,GPIO,,CMP2_OUT,SPI0_MOSI,I2C0_SCL,UT8_T1,SD_CLK,
61+
P7_2,GPIO,,UART3_CTS,CMP1_OUT,SPI0_SCLK,I2C1_SDA,UT9_T0,SD_RST
62+
P7_3,GPIO,,UART3_RTS,CMP0_OUT,SPI0_SS0,I2C1_SCL,UT9_T1,
63+
P7_4,GPIO,,LPUART_CTS,LPPDM_C2,LPSPI_MISO,LPI2C_SCL,UT10_T0,
64+
P7_5,GPIO,,LPUART_RTS,,LPPDM_D2,LPSPI_MOSI,LPI2C_SDA,UT10_T1
65+
P7_6,GPIO,,LPUART_RX,,LPPDM_C3,LPSPI_SCLK,I3C_SDA,UT11_T0
66+
P7_7,GPIO,,LPUART_TX,,LPPDM_D3,LPSPI_SS,I3C_SCL,UT11_T1
67+
P8_0,GPIO,OSPI1_SCLKN,AUDIO_CLK,FAULT0_B,LPCAM_D0,SD_D0,CDC_D0,CAM_D0
68+
P8_1,GPIO,I2S2_SDI,FAULT1_B,LPCAM_D1,SD_D1,CDC_D1,CAM_D1,
69+
P8_2,GPIO,I2S2_SDO,SPI0_SS3,FAULT2_B,LPCAM_D2,SD_D2,CDC_D2,CAM_D2
70+
P8_3,GPIO,I2S2_SCLK,SPI1_MISO,FAULT3_B,LPCAM_D3,SD_D3,CDC_D3,CAM_D3
71+
P8_4,GPIO,I2S2_WS,SPI1_MOSI,QEC0_X,LPCAM_D4,SD_D4,CDC_D4,CAM_D4
72+
P8_5,GPIO,,SPI1_SCLK,QEC0_Y,LPCAM_D5,SD_D5,CDC_D5,CAM_D5
73+
P8_6,GPIO,,I2S3_SCLK,QEC0_Z,LPCAM_D6,SD_D6,CDC_D6,CAM_D6
74+
P8_7,GPIO,,I2S3_WS,QEC1_X,LPCAM_D7,SD_D7,CDC_D7,CAM_D7
75+
P9_0,GPIO,,I2S3_SDI,QEC1_Y,SD_CMD,CDC_D8,CAM_D8,
76+
P9_1,GPIO,LPUART_RX,I2S3_SDO,QEC1_Z,SD_CLK,CDC_D9,CAM_D9,
77+
P9_2,GPIO,LPUART_TX,I2S3_SDI,SPI2_MISO,QEC2_X,SD_RST,CDC_D10,CAM_D10
78+
P9_3,GPIO,HFXO_OUT,UART7_RX,I2S3_SDO,SPI2_MOSI,QEC2_Y,CDC_D11,CAM_D11
79+
P9_4,GPIO,UART7_TX,I2S3_SCLK,SPI2_SCLK,I2C3_SDA,QEC2_Z,CDC_D12,CAM_D12
80+
P9_5,GPIO,OSPI1_D0,I2S3_WS,SPI2_SS0,I2C3_SCL,QEC3_X,CDC_D13,CAM_D13
81+
P9_6,GPIO,OSPI1_D1,AUDIO_CLK,SPI2_SS1,I2C3_SDA,QEC3_Y,CDC_D14,CAM_D14
82+
P9_7,GPIO,OSPI1_D2,UART7_DE,SPI2_SS2,I2C3_SCL,QEC3_Z,CDC_D15,CAM_D15
83+
P10_0,GPIO,OSPI1_D3,UART6_DE,SPI2_SS3,UT0_T0,LPCAM_HSYNC,CDC_D16,CAM_HSYNC
84+
P10_1,GPIO,OSPI1_D4,,LPI2S_SDI,UT0_T1,LPCAM_VSYNC,CDC_D17,CAM_VSYNC
85+
P10_2,GPIO,OSPI1_D5,,LPI2S_SDO,UT1_T0,LPCAM_PCLK,CDC_D18,CAM_PCLK
86+
P10_3,GPIO,OSPI1_D6,,LPI2S_SCLK,UT1_T1,LPCAM_XVCLK,CDC_D19,CAM_XVCLK
87+
P10_4,GPIO,OSPI1_D7,,LPI2S_WS,I2C0_SDA,UT2_T0,ETH_TXD0,CDC_D20
88+
P10_5,GPIO,UART6_RX,I2S2_SDI,SPI3_MISO,I2C0_SCL,UT2_T1,ETH_TXD1,CDC_D21
89+
P10_6,GPIO,UART6_TX,I2S2_SDO,SPI3_MOSI,I2C1_SDA,UT3_T0,ETH_TXEN,CDC_D22
90+
P10_7,GPIO,UART7_RX,I2S2_SCLK,SPI3_SCLK,I2C1_SCL,UT3_T1,CDC_D23,OSPI1_RXDS
91+
P11_0,GPIO,OSPI1_D0,UART7_TX,I2S2_WS,SPI3_SS0,UT4_T0,ETH_REFCLK,CDC_D0
92+
P11_1,GPIO,OSPI1_D1,UART7_DE,SPI3_SS1,UT4_T1,ETH_MDIO,CDC_D1,
93+
P11_2,GPIO,OSPI1_D2,UART6_DE,LPPDM_C2,SPI3_SS2,UT5_T0,ETH_MDC,CDC_D2
94+
P11_3,GPIO,OSPI1_D3,UART5_RX,LPPDM_C3,SPI3_SS3,UT5_T1,ETH_RXD0,CDC_D3
95+
P11_4,GPIO,OSPI1_D4,UART5_TX,PDM_C2,LPSPI_MISO,UT6_T0,ETH_RXD1,CDC_D4
96+
P11_5,GPIO,OSPI1_D5,UART6_RX,PDM_C3,LPSPI_MOSI,UT6_T1,ETH_CRS_DV_B,CDC_D5
97+
P11_6,GPIO,OSPI1_D6,UART6_TX,LPPDM_D2,LPSPI_SCLK,UT7_T0,ETH_RST,CDC_D6
98+
P11_7,GPIO,OSPI1_D7,UART5_DE,LPPDM_D3,LPSPI_SS,UT7_T1,ETH_IRQ,CDC_D7
99+
P12_0,GPIO,OSPI0_SCLK,AUDIO_CLK,I2S1_SDI,UT8_T0,CDC_D8,,
100+
P12_1,GPIO,OSPI0_SCLKN,UART4_RX,I2S1_SDO,UT8_T1,CDC_D9,,
101+
P12_2,GPIO,OSPI0_RXDS,UART4_TX,I2S1_SCLK,UT9_T0,CDC_D10,,
102+
P12_3,GPIO,OSPI0_SS0,UART4_DE,I2S1_WS,UT9_T1,CDC_D11,,
103+
P12_4,GPIO,OSPI0_SS1,SPI3_MISO,UT10_T0,,CDC_D12,,
104+
P12_5,GPIO,,SPI3_MOSI,UT10_T1,,CDC_D13,,
105+
P12_6,GPIO,,SPI3_SCLK,UT11_T0,,CDC_D14,,
106+
P12_7,GPIO,OSPI1_RXDS,,SPI3_SS0,UT11_T1,CDC_D15,,
107+
P13_0,GPIO,OSPI1_D0,,SPI3_SS1,QEC0_X,SD_D0,CDC_D16,
108+
P13_1,GPIO,OSPI1_D1,SPI3_SS2,QEC0_Y,SD_D1,CDC_D17,,
109+
P13_2,GPIO,OSPI1_D2,SPI3_SS3,QEC0_Z,SD_D2,CDC_D18,,
110+
P13_3,GPIO,OSPI1_D3,SPI2_SS3,QEC1_X,SD_D3,CDC_D19,,
111+
P13_4,GPIO,OSPI1_D4,LPI2S_SDI,QEC1_Y,SD_D4,CDC_D20,,
112+
P13_5,GPIO,OSPI1_D5,LPI2S_SDO,QEC1_Z,SD_D5,CDC_D21,,
113+
P13_6,GPIO,OSPI1_D6,LPI2S_SCLK,QEC2_X,SD_D6,CDC_D22,,
114+
P13_7,GPIO,OSPI1_D7,LPI2S_WS,QEC2_Y,SD_D7,CDC_D23,,
115+
P14_0,GPIO,OSPI1_SCLK,UART6_RX,QEC2_Z,SD_CMD,,,
116+
P14_1,GPIO,OSPI1_SCLKN,UART6_TX,,QEC3_X,SD_CLK,,
117+
P14_2,GPIO,OSPI1_SS0,UART7_RX,,QEC3_Y,SD_RST,,
118+
P14_3,GPIO,OSPI1_SS1,UART7_TX,,QEC3_Z,,,
119+
P14_4,GPIO,CMP3_OUT,SPI1_MISO,FAULT0_C,,,,
120+
P14_5,GPIO,CMP2_OUT,SPI1_MOSI,FAULT1_C,,,,
121+
P14_6,GPIO,CMP1_OUT,SPI1_SCLK,FAULT2_C,,,,
122+
P14_7,GPIO,CMP0_OUT,SPI1_SS0,FAULT3_C,,,,
123+
P15_0,GPIO,LPTMR0_CLK,,,,,,
124+
P15_1,GPIO,LPTMR1_CLK,,,,,,
125+
P15_2,GPIO,LPTMR2_CLK,,,,,,
126+
P15_3,GPIO,LPTMR3_CLK,,,,,,
127+
P15_4,GPIO,,,,,,,
128+
P15_5,GPIO,,,,,,,
129+
P15_6,GPIO,,,,,,,
130+
P15_7,GPIO,,,,,,,

‎ports/alif/mcu/make-pins.py

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,11 +36,19 @@
3636
class AlifPin(boardgen.Pin):
3737
def __init__(self, cpu_pin_name):
3838
super().__init__(cpu_pin_name)
39-
self._afs = ["MP_HAL_PIN_ALT_NONE"] * 8
39+
self._afs = [("NONE", -1)] * 8
4040

4141
# Called for each AF defined in the csv file for this pin.
4242
def add_af(self, af_idx, af_name, af):
43-
self._afs[af_idx] = f"MP_HAL_PIN_ALT_{af}"
43+
if af == "GPIO":
44+
self._afs[af_idx] = "GPIO", -1
45+
elif af.startswith("ANA_S"):
46+
self._afs[af_idx] = "ANA", int(af[5:])
47+
else:
48+
m = re.match(r"([A-Z0-9]+[A-Z])(\d*)_([A-Z0-9_]+)$", af)
49+
periph, unit, line = m.groups()
50+
unit = -1 if unit == "" else int(unit)
51+
self._afs[af_idx] = f"{periph}_{line}", unit
4452

4553
# Emit the struct which contains the pin instance.
4654
def definition(self):
@@ -63,7 +71,7 @@ def definition(self):
6371
base=base,
6472
adc12_periph=adc12_periph,
6573
adc12_channel=adc12_channel,
66-
alt=", ".join([f"{af}" for af in self._afs]),
74+
alt=", ".join([f"MP_HAL_PIN_ALT({func}, {unit})" for func, unit in self._afs]),
6775
)
6876
)
6977

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