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| 1 | +#include "shared-bindings/board/__init__.h" |
| 2 | + |
| 3 | +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { |
| 4 | + |
| 5 | + /* default ports */ |
| 6 | + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, |
| 7 | + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, |
| 8 | + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, |
| 9 | + |
| 10 | + /* TG-Watch02 specific pins */ |
| 11 | + { MP_ROM_QSTR(MP_QSTR_VBUS_PRESENT), MP_ROM_PTR(&pin_P1_04) }, |
| 12 | + { MP_ROM_QSTR(MP_QSTR_HAPTIC_ENABLE), MP_ROM_PTR(&pin_P1_06) }, |
| 13 | + { MP_ROM_QSTR(MP_QSTR_HAPTIC_INT), MP_ROM_PTR(&pin_P1_07) }, |
| 14 | + { MP_ROM_QSTR(MP_QSTR_CTP_INT), MP_ROM_PTR(&pin_P1_05) }, |
| 15 | + { MP_ROM_QSTR(MP_QSTR_CTP_RST), MP_ROM_PTR(&pin_P1_03) }, |
| 16 | + { MP_ROM_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_P1_01) }, |
| 17 | + |
| 18 | + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P1_12) }, |
| 19 | + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_P1_13) }, |
| 20 | + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_P1_14) }, |
| 21 | + |
| 22 | + { MP_ROM_QSTR(MP_QSTR_ACCEL_INT1), MP_ROM_PTR(&pin_P1_11) }, |
| 23 | + { MP_ROM_QSTR(MP_QSTR_ACCEL_INT2), MP_ROM_PTR(&pin_P1_10) }, |
| 24 | + |
| 25 | + { MP_ROM_QSTR(MP_QSTR_BATTERY_DIV), MP_ROM_PTR(&pin_P0_29) }, |
| 26 | + |
| 27 | + { MP_ROM_QSTR(MP_QSTR_RTC_INT), MP_ROM_PTR(&pin_P0_27) }, |
| 28 | + { MP_ROM_QSTR(MP_QSTR_RTC_RST), MP_ROM_PTR(&pin_P0_26) }, |
| 29 | + { MP_ROM_QSTR(MP_QSTR_CHRG_STAT), MP_ROM_PTR(&pin_P0_06) }, |
| 30 | + { MP_ROM_QSTR(MP_QSTR_BACKLIGHT), MP_ROM_PTR(&pin_P0_07) }, |
| 31 | + { MP_ROM_QSTR(MP_QSTR_SMC_RST), MP_ROM_PTR(&pin_P0_08) }, |
| 32 | + |
| 33 | + /* nrf52840 compatible pins */ |
| 34 | + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, |
| 35 | + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, |
| 36 | + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_30) }, |
| 37 | + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_28) }, |
| 38 | + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, |
| 39 | + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, |
| 40 | + |
| 41 | + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_31) }, |
| 42 | + |
| 43 | + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_29) }, |
| 44 | + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_29) }, |
| 45 | + |
| 46 | + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P1_02) }, |
| 47 | + |
| 48 | + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, |
| 49 | + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, |
| 50 | + |
| 51 | + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_10) }, |
| 52 | + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_08) }, |
| 53 | + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_07) }, |
| 54 | + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_26) }, |
| 55 | + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_27) }, |
| 56 | + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_06) }, |
| 57 | + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_08) }, |
| 58 | + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_09) }, |
| 59 | + |
| 60 | + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_16) }, |
| 61 | + |
| 62 | + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_14) }, |
| 63 | + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_13) }, |
| 64 | + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_15) }, |
| 65 | + |
| 66 | + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_25) }, |
| 67 | + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_24) }, |
| 68 | + |
| 69 | + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, |
| 70 | + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_12) }, |
| 71 | +}; |
| 72 | + |
| 73 | +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); |
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