add feather bootloader settings, cleanup

Author: hierophect

ports/stm32f4/boards/STM32F401_boot.ld

@@ -5,9 +5,9 @@
 /* Specify the memory areas */
 MEMORY
 {
-    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
-    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K 
-    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */
+    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 512K - 64K  /* entire flash, sans bootloader region */
+    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K         /* sector 4 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K        /* sectors 5,6,7 are 128K */
     RAM (xrw)       : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
 }
 

ports/stm32f4/boards/STM32F401.ld renamed to ports/stm32f4/boards/STM32F405_boot.ld

@@ -1,39 +1,30 @@
 /*
-    GNU linker script for STM32F401 with bootloader (from Meowbit Micropython)
-    Doesn't work: 
-
-    Traceback (most recent call last):
-  File "../../tools/build_memory_info.py", line 64, in <module>
-    regions[region] = int(eval(space))
-  File "<string>", line 1, in <module>
-NameError: name 'FLASH_ISR' is not defined
+    GNU linker script for STM32F405 with bootloader
+    Based on Micropython
 */
 
 /* Specify the memory areas */
-/*     FLASH_FS (rx)   : ORIGIN = 0x08020000, LENGTH = 128K */
-/* sectors 5 128K */
 MEMORY
 {
-    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
-    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */
-    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */
-    RAM (xrw)       : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
+    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 1024K - 64K         /* entire flash, sans bootloader region */
+    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K                 /* sector 0 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K   /* sectors 5+ */
+    CCMRAM (xrw)    : ORIGIN = 0x10000000, LENGTH = 64K
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 128K
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
 _minimum_stack_size = 2K;
 _minimum_heap_size = 16K;
 
-/* Define the stack.  The stack is full descending so begins just above last byte
-   of RAM.  Note that EABI requires the stack to be 8-byte aligned for a call. */
-_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
-_sstack = _estack - 16K; /* tunable */
+/* Define tho top end of the stack.  The stack is full descending so begins just
+   above last byte of RAM.  Note that EABI requires the stack to be 8-byte
+   aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
 
 /* RAM extents for the garbage collector */
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
-_heap_start = _ebss; /* heap starts just after statically allocated memory */
-_heap_end = _sstack;
 
 ENTRY(Reset_Handler)
 
@@ -47,25 +38,8 @@ SECTIONS
         KEEP(*(.isr_vector)) /* Startup code */
 
         /* This first flash block is 16K annd the isr vectors only take up
-           about 400 bytes. So we pull in a couple of object files to pad it
-           out. */
-
-        . = ALIGN(4);
-
-        /* NOTE: If you update the list of files contained in .isr_vector,
-                 then be sure to also update smhal/Makefile where it forcibly
-           builds each of these files with -Os */
-
-        */ff.o(.text*)
-        */vfs_fat_*.o(.text*)
-        */py/formatfloat.o(.text*)
-        */py/parsenum.o(.text*)
-        */py/mpprint.o(.text*)
-
-        */py/compile.o(.text*)
-        */py/objset.o(.text*)
-        */py/mpz.o(.text*)
-        */py/vm.o(.text*)
+           about 400 bytes. Micropython pads this with files, but this didn't
+           work with the size of Circuitpython's ff object. */
 
         . = ALIGN(4);
     } >FLASH_ISR
@@ -130,3 +104,5 @@ SECTIONS
 
     .ARM.attributes 0 : { *(.ARM.attributes) }
 }
+
+

ports/stm32f4/boards/STM32F405.ld renamed to ports/stm32f4/boards/STM32F405_fs.ld

@@ -40,6 +40,9 @@
 #define SPI_FLASH_SCK_PIN           (&pin_PB03)
 #define SPI_FLASH_CS_PIN            (&pin_PA15)
 
+// Bootloader only
+#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader
+
 #define DEFAULT_I2C_BUS_SCL (&pin_PB06)
 #define DEFAULT_I2C_BUS_SDA (&pin_PB07)
 

ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h

@@ -9,11 +9,12 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1
 EXTERNAL_FLASH_DEVICES = GD25Q16C
 LONGINT_IMPL = MPZ
 
+BOOTLOADER_OFFSET = 0x8010000
+
 MCU_SERIES = m4
 MCU_VARIANT = stm32f4
 MCU_SUB_VARIANT = stm32f405xx
 MCU_PACKAGE = 64
 CMSIS_MCU = STM32F405xx
-LD_FILE = boards/STM32F405.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08010000
+LD_FILE = boards/STM32F405_boot.ld # use for bootloader (external fs only)
+# LD_FILE = boards/STM32F405_fs.ld # use for internal filesystem

ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk

@@ -20,4 +20,4 @@ MCU_SUB_VARIANT = stm32f401xe
 MCU_PACKAGE = 64
 CMSIS_MCU = STM32F401xE
 LD_FILE = boards/STM32F401_boot.ld 
-# LD_FILE = boards/STM32F401_fs.ld #use for internal flash
+# LD_FILE = boards/STM32F401_fs.ld # use for internal flash