@@ -58,7 +58,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
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const mcu_pin_obj_t * tx , const mcu_pin_obj_t * rx ,
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const mcu_pin_obj_t * rts , const mcu_pin_obj_t * cts ,
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const mcu_pin_obj_t * rs485_dir , bool rs485_invert ,
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- uint32_t baudrate , uint8_t bits , uart_parity_t parity , uint8_t stop ,
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+ uint32_t baudrate , uint8_t bits , busio_uart_parity_t parity , uint8_t stop ,
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mp_float_t timeout , uint16_t receiver_buffer_size , byte * receiver_buffer ,
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bool sigint_enabled ) {
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@@ -195,7 +195,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
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SERCOM_USART_CTRLA_FORM_Msk );
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sercom -> USART .CTRLA .reg |= SERCOM_USART_CTRLA_TXPO (tx_pad / 2 ) |
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SERCOM_USART_CTRLA_RXPO (rx_pad ) |
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- (parity == PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM (1 ));
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+ (parity == BUSIO_UART_PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM (1 ));
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// Enable tx and/or rx based on whether the pins were specified.
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// CHSIZE is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that.
@@ -206,7 +206,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
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SERCOM_USART_CTRLB_CHSIZE_Msk );
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sercom -> USART .CTRLB .reg |= (have_tx ? SERCOM_USART_CTRLB_TXEN : 0 ) |
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(have_rx ? SERCOM_USART_CTRLB_RXEN : 0 ) |
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- (parity == PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0 ) |
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+ (parity == BUSIO_UART_PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0 ) |
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(stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0 ) |
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SERCOM_USART_CTRLB_CHSIZE (bits % 8 );
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