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generalize # of ports; remove atmel neopixel code; remove pin name in mc_pin_obj_t
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3 files changed

+5
-133
lines changed

3 files changed

+5
-133
lines changed

ports/nrf/common-hal/microcontroller/Pin.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,11 +44,12 @@ bool speaker_enable_in_use;
4444
#endif
4545

4646
// Bit mask of claimed pins on each of up to two ports. nrf52832 has one port; nrf52840 has two.
47-
STATIC uint32_t claimed_pins[2];
47+
STATIC uint32_t claimed_pins[GPIO_COUNT];
4848

4949
void reset_all_pins(void) {
50-
claimed_pins[0] = 0;
51-
claimed_pins[1] = 0;
50+
for (size_t i = 0; i < GPIO_COUNT; i++) {
51+
claimed_pins[i] = 0;
52+
}
5253

5354
for (uint32_t pin = 0; pin < NUMBER_OF_PINS; ++pin) {
5455
nrf_gpio_cfg_default(pin);

ports/nrf/common-hal/neopixel_write/__init__.c

Lines changed: 1 addition & 128 deletions
Original file line numberDiff line numberDiff line change
@@ -29,133 +29,6 @@
2929

3030
#include "tick.h"
3131

32-
// This magical macro makes sure the delay isn't optimized out and is the
33-
// minimal three instructions.
34-
#define delay_cycles(cycles) \
35-
{ \
36-
uint32_t t; \
37-
asm volatile ( \
38-
"movs %[t], %[c]\n\t" \
39-
"loop%=:\n\t" \
40-
"subs %[t], #1\n\t" \
41-
"bne.n loop%=" : [t] "=r"(t) : [c] "I" (cycles)); \
42-
}
43-
44-
uint64_t next_start_tick_ms = 0;
45-
uint32_t next_start_tick_us = 1000;
46-
4732
void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) {
48-
// TODO: Figure out timing delays on nRF. Turn off cache using ICACHECNF register.
49-
/*
50-
// This is adapted directly from the Adafruit NeoPixel library SAMD21G18A code:
51-
// https://github.com/adafruit/Adafruit_NeoPixel/blob/master/Adafruit_NeoPixel.cpp
52-
uint8_t *ptr, *end, p, bitMask;
53-
uint32_t pinMask;
54-
PortGroup* port;
55-
56-
// This must be called while interrupts are on in case we're waiting for a
57-
// future ms tick.
58-
wait_until(next_start_tick_ms, next_start_tick_us);
59-
60-
// Turn off interrupts of any kind during timing-sensitive code.
61-
mp_hal_disable_all_interrupts();
62-
63-
64-
// Make sure the NVM cache is consistently timed.
65-
66-
NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_DETERMINISTIC_Val;
67-
#endif
68-
69-
uint32_t pin = digitalinout->pin->number;
70-
port = &PORT->Group[GPIO_PORT(pin)]; // Convert GPIO # to port register
71-
pinMask = (1UL << (pin % 32)); // From port_pin_set_output_level ASF code.
72-
ptr = pixels;
73-
end = ptr + numBytes;
74-
p = *ptr++;
75-
bitMask = 0x80;
76-
77-
volatile uint32_t *set = &(port->OUTSET.reg),
78-
*clr = &(port->OUTCLR.reg);
79-
80-
for(;;) {
81-
*set = pinMask;
82-
// This is the time where the line is always high regardless of the bit.
83-
// For the SK6812 its 0.3us +- 0.15us
84-
#ifdef SAMD21
85-
asm("nop; nop;");
86-
#endif
87-
#ifdef SAMD51
88-
delay_cycles(3);
89-
#endif
90-
if(p & bitMask) {
91-
// This is the high delay unique to a one bit.
92-
// For the SK6812 its 0.3us
93-
#ifdef SAMD21
94-
asm("nop; nop; nop; nop; nop; nop; nop;");
95-
#endif
96-
#ifdef SAMD51
97-
delay_cycles(11);
98-
#endif
99-
*clr = pinMask;
100-
} else {
101-
*clr = pinMask;
102-
// This is the low delay unique to a zero bit.
103-
// For the SK6812 its 0.3us
104-
#ifdef SAMD21
105-
asm("nop; nop;");
106-
#endif
107-
#ifdef SAMD51
108-
delay_cycles(3);
109-
#endif
110-
}
111-
if((bitMask >>= 1) != 0) {
112-
// This is the delay between bits in a byte and is the 1 code low
113-
// level time from the datasheet.
114-
// For the SK6812 its 0.6us +- 0.15us
115-
#ifdef SAMD21
116-
asm("nop; nop; nop; nop; nop;");
117-
#endif
118-
#ifdef SAMD51
119-
delay_cycles(20);
120-
#endif
121-
} else {
122-
if(ptr >= end) break;
123-
p = *ptr++;
124-
bitMask = 0x80;
125-
// This is the delay between bytes. It's similar to the other branch
126-
// in the if statement except its tuned to account for the time the
127-
// above operations take.
128-
// For the SK6812 its 0.6us +- 0.15us
129-
#ifdef SAMD51
130-
delay_cycles(15);
131-
#endif
132-
}
133-
}
134-
135-
#ifdef SAMD21
136-
// Speed up! (But inconsistent timing.)
137-
NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY_Val;
138-
#endif
139-
140-
#ifdef SAMD51
141-
// Turn instruction, data, and NVM caches back on.
142-
hri_cmcc_clear_CFG_reg(CMCC, CMCC_CFG_DCDIS | CMCC_CFG_ICDIS);
143-
hri_nvmctrl_clear_CTRLA_CACHEDIS0_bit(NVMCTRL);
144-
hri_nvmctrl_clear_CTRLA_CACHEDIS1_bit(NVMCTRL);
145-
146-
#endif
147-
148-
// ticks_ms may be out of date at this point because we stopped the
149-
// interrupt. We'll risk it anyway.
150-
current_tick(&next_start_tick_ms, &next_start_tick_us);
151-
if (next_start_tick_us < 100) {
152-
next_start_tick_ms += 1;
153-
next_start_tick_us = 100 - next_start_tick_us;
154-
} else {
155-
next_start_tick_us -= 100;
156-
}
157-
158-
// Turn on interrupts after timing-sensitive code.
159-
mp_hal_enable_all_interrupts();
160-
*/
33+
// stub
16134
}

ports/nrf/peripherals/nrf/pins.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,6 @@
3737

3838
typedef struct {
3939
mp_obj_base_t base;
40-
qstr name;
4140
// These could be squeezed to fewer bits if more fields are needed.
4241
uint8_t number; // port << 5 | pin number in port (0-31): 6 bits needed
4342
uint8_t adc_channel; // 0 is no ADC, ADC channel from 1 to 8:
@@ -50,7 +49,6 @@ extern const mp_obj_type_t mcu_pin_type;
5049
#define PIN(p_name, p_port, p_pin, p_adc_channel) \
5150
{ \
5251
{ &mcu_pin_type }, \
53-
.name = MP_QSTR_ ## p_name, \
5452
.number = NRF_GPIO_PIN_MAP(p_port, p_pin), \
5553
.adc_channel = (p_adc_channel), \
5654
}

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