Changes to add compiler optimization option

siehputz · siehputz · commit d83a4ac72db9 · 2020-07-22T12:44:41.000-05:00
diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile
@@ -106,11 +106,11 @@ CFLAGS += -Os -DNDEBUG
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024
 endif
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
 
-
 $(echo PERIPHERALS_CHIP_FAMILY=$(PERIPHERALS_CHIP_FAMILY))
 #Debugging/Optimization
 ifeq ($(DEBUG), 1)
diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk
@@ -15,5 +15,4 @@ LONGINT_IMPL = MPZ
 CIRCUITPY_AUDIOBUSIO = 0
 
 CIRCUITPY_BITBANG_APA102 = 1
-
 OPTIMIZATION_LEVEL = 2
diff --git a/ports/atmel-samd/boards/pybadge/mpconfigboard.mk b/ports/atmel-samd/boards/pybadge/mpconfigboard.mk
@@ -16,5 +16,4 @@ CIRCUITPY_GAMEPADSHIFT = 1
 CIRCUITPY_STAGE = 1
 
 FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pybadge
-
 OPTIMIZATION_LEVEL = 2
diff --git a/ports/atmel-samd/boards/pyportal/mpconfigboard.mk b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk
@@ -10,5 +10,4 @@ QSPI_FLASH_FILESYSTEM = 1
 EXTERNAL_FLASH_DEVICE_COUNT = 2
 EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C"
 LONGINT_IMPL = MPZ
-
 OPTIMIZATION_LEVEL = 2
diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile
@@ -123,6 +123,7 @@ CFLAGS += \
 	-fdata-sections \
 	-Wall \
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
@@ -109,6 +109,7 @@ else
   ### CFLAGS += -flto
 endif
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
@@ -17,5 +17,4 @@ CIRCUITPY_ESP_FLASH_FREQ=40m
 CIRCUITPY_ESP_FLASH_SIZE=4MB
 
 CIRCUITPY_MODULE=wroom
-
 OPTIMIZATION_LEVEL = 2
diff --git a/ports/litex/Makefile b/ports/litex/Makefile
@@ -83,6 +83,7 @@ else
   ### CFLAGS += -flto
 endif
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile
@@ -108,6 +108,7 @@ CFLAGS += \
 	-Os -g3 -Wno-unused-parameter \
 	-ffunction-sections -fdata-sections -fstack-usage
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
@@ -92,6 +92,7 @@ else
   CFLAGS += -flto -flto-partition=none
 endif
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk
@@ -14,3 +14,5 @@ EXTERNAL_FLASH_DEVICES = "GD25Q16C"
 # We use a CFLAGS define here because there are include order issues
 # if we try to include "mpconfigport.h" into nrfx_config.h .
 CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2
+
+OPTIMIZATION_LEVEL = 2
diff --git a/ports/stm/Makefile b/ports/stm/Makefile
@@ -91,6 +91,7 @@ else
 	# CFLAGS += -flto
 endif
 
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 ifdef OPTIMIZATION_LEVEL
 CFLAGS += -O$(OPTIMIZATION_LEVEL)
 endif
diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk
@@ -15,3 +15,5 @@ LD_COMMON = boards/common_default.ld
 LD_DEFAULT = boards/STM32F405_default.ld
 LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
 UF2_OFFSET = 0x8010000
+
+OPTIMIZATION_LEVEL = 2
